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ZHCSOF5A May 2022 – September 2022 TPS25985

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机械数据 (封装 | 引脚)

RQP|26
- MPQF569A

散热焊盘机械数据 (封装 | 引脚)

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zhcsof5a_oa

8.3.11 Fault Response and Indication (FLT)

Table 8-3 summarizes the device response to various fault conditions.

Table 8-3 Fault Summary

Event or Condition	Device Response	Fault Latched Internally	FLT Pin Status	Delay
Steady-state	None	N/A	H
Inrush	None	N/A	H
Overtemperature	Shutdown	Y	L
Undervoltage (EN/UVLO)	Shutdown	N	H
Undervoltage (VDD UVP)	Shutdown	N	H
Undervoltage (VIN UVP)	Shutdown	N	H
Overvoltage (VIN OVP)	Shutdown	N	H
Transient overcurrent	None	N	H
Persistent overcurrent (steady-state)	Circuit-Breaker	Y	L	t_ITIMER
Persistent overcurrent (start-up)	Current Limit	N	L
Short-circuit (primary mode)	Fast-trip	Y	L	t_FT
Short-circuit (secondary mode)	Fast-trip followed by current limited Start-up	N	H
ILIM pin open (start-up)	Shutdown	Y	L
ILIM pin short (start-up)	Shutdown (if I_OUT > I_{OC_BKP})	Y	L
ILIM pin open (steady-state)	Active current sharing loop always active	N	H
ILIM pin short (steady-state)	Active current sharing loop disabled	N	H
IMON pin open (steady-state)	Shutdown	Y	L
IMON pin short (steady-state)	Shutdown (If I_OUT > I_{OC_BKP})	Y	L	45 μs
IREF pin open (start-up)	Shutdown (If I_OUT > I_{OC_BKP})	Y	L
IREF pin open (steady-state)	Shutdown (if I_OUT > I_{OC_BKP})	Y	L	t_ITIMER
IREF pin short (steady-state)	Shutdown	Y	L
IREF pin short (start-up)	Shutdown	Y	L
ITIMER pin forced to high voltage	Shutdown (if I_OUT > I_OCP or I_OUT > I_{OC_BKP})	Y	L	t_{SPFAIL_TMR}
Start-up timeout	Shutdown	Y	L	t_{SU_TMR}
FET health fault (G-S)	Shutdown	Y	L	10 μs
FET health fault (G-D)	Shutdown	Y	L
FET health fault (D-S)	Shutdown	N	L	t_{SU_TMR}
External fault (SWEN pulled low externally while device is not in UV or OV)	Shutdown	Y	L

FLT is an open-drain pin and must be pulled up to an external supply.

The device response after a fault varies based on the mode of operation:

During standalone or primary mode of operation (MODE = OPEN), the device latches a fault and follows the auto-retry or latch-off response as per the device selection. When the device turns on again, it follows the usual DVDT limited start-up sequence.
During the secondary mode of operation (MODE = GND), if the device detects any fault, it pulls the SWEN pin low momentarily to signal the event to the primary device and thereafter relies on the primary to take control of the fault response. However, if the primary device fails to register the fault, there i a failsafe mechanism in the secondary device to turn off the entire chain and enter a latch-off condition. Thereafter, the device can be turned on again only by power cycling VDD below V_UVP(F) or by cycling EN/UVLO pin below V_SD(F).

For faults that are latched internally, power cycling the part or pulling the EN/UVLO pin voltage below V_SD(F) clears the fault and the pin is de-asserted. This action also clears the t_RST timer (auto-retry variants only). Pulling the EN/UVLO just below the UVLO threshold has no impact on the device in this condition. This is true for both latch-off and auto-retry variants.