The TPS25985x is an eFuse with integrated power switch that is used to manage load voltage and load current. The device starts its operation by monitoring the VDD and IN bus. When V_DD and V_IN exceed the respective Undervoltage Protection (UVP) thresholds, the device waits for the insertion delay timer duration to allow the supply to stabilize before starting up. Next the device samples the EN/UVLO pin and SWEN pins. A high level on both these pins enables the internal MOSFET to start conducting and allow current to flow from IN to OUT. When either EN/UVLO or SWEN is held low, the internal MOSFET is turned off.

After a successful start-up sequence, the TPS25985x device now actively monitors its load current and input voltage, and controls the internal FET to ensure that the programmed overcurrent threshold is not exceeded and input overvoltage spikes are cut off. This action keeps the system safe from harmful levels of voltage and current. At the same time, a user-adjustable overcurrent blanking timer allows the system to pass transient peaks in the load current profile without tripping the eFuse. Similarly, voltage transients on the supply line are intelligently masked to prevent nuisance trips. This feature ensures a robust protection solution against real faults which is also immune to transients, thereby ensuring maximum system uptime.

The device has integrated high accuracy and high bandwidth analog load current monitor, which allows the system to precisely monitor the load current in steady state as well as during transients. This feature facilitates the implementation of advanced dynamic platform power management techniques such as Intel PSYS or PROCHOT# to maximize system power usage and throughput without sacrificing safety and reliability.

For systems needing higher load current support, multiple TPS25985x eFuses can be connected in parallel. All devices share current during start-up as well as steady-state to avoid over-stressing some of the devices more than others which can result in premature or partial shutdown of the parallel chain. The devices synchronize their operating states to ensure graceful startup, shutdown and response to faults. This makes the whole chain function as a single very high current eFuse rather than a bunch of independent eFuses operating asynchronously.

The device has integrated protection circuits to ensure device safety and reliability under recommended operating conditions. The internal FET SOA is protected at all times using the thermal shutdown mechanism, which turns off the FET whenever the junction temperature (T_J) becomes too high for the FET to operate safely.