The TPS25985x can detect and report certain conditions which are indicative of a failure of the power path FET. If undetected or unreported, these conditions can compromise system performance by not providing power to the load correctly or by not providing the necessary level of protection. After a FET failure is detected, the TPS25985x tries to turn off the internal FET by pulling the gate low and asserts the FLT pin.

• D-S short: D-S short can result in a constant uncontrolled power delivery path formed from source to load, either due to a board assembly defect or due to internal FET failure. This condition is detected at start-up by checking if V_IN-OUT < V_DSFLT before the FET is turned ON. If yes, the device engages the internal output discharge to try and discharge the output. If the V_OUT does not discharge below V_FB within a certain allowed interval, the device asserts the FLT pin.

• G-D short: The TPS25985x detects this kind of FET failure at all times by checking if the gate voltage is close to V_IN even when the internal control logic is trying to hold the FET in OFF condition.

• G-S short: The TPS25985x detects this kind of FET failure during start-up by checking if the FET G-S voltage fails to reach the necessary overdrive voltage within a certain timeout period (t_{SU_TMR}) after the gate driver is turned ON. While in steady-state, if the G-S voltage becomes low before the controller logic has signaled to the gate driver to turn off the FET, it is latched as a fault.