ZHCSFF5G July 2016 – December 2019 TPS2660
PRODUCTION DATA.
请参考 PDF 数据表获取器件具体的封装图。
The devices are designed to control the in-rush current upon insertion of a card into a live backplane or other "hot" power source. This limits the voltage sag on the backplane’s supply voltage and prevents unintended resets of the system power. The controlled start-up also helps to eliminate conductive and radiative interferences. An external capacitor connected from the dVdT pin to RTN defines the slew rate of the output voltage at power-on as shown in Figure 37 and Figure 38.
The dVdT pin can be left floating to obtain a predetermined slew rate (tdVdT) on the output. When the terminal is left floating, the devices set an internal output voltage ramp rate of 23.9 V/1.6 ms. A capacitor can be connected from dVdT pin to RTN to program the output voltage slew rate slower than 23.9 V/1.6 ms. Use Equation 1 and Equation 2 to calculate the external C(dVdT) capacitance.
Equation 1 governs slew rate at start-up.
where
The total ramp time (tdVdT) of V(OUT) for 0 to V(IN) can be calculated using Equation 2.
CdVdT = 22 nF | COUT = 47 µF | RILIM = 5.36 kΩ |