The TPS26750 power management block receives power and generates voltages to provide power to the TPS26750 internal circuitry. These generated power rails are LDO_3V3 and LDO_1V5. LDO_3V3 can also be used as a low power output for external EEPROM memory. The power supply path is shown in Figure 7-9.

Figure 7-9 Power Supplies

The TPS26750 is powered from either VIN_3V3 or VBUS. The normal power supply input is VIN_3V3. When powering from VIN_3V3, current flows from VIN_3V3 to LDO_3V3 to power the core 3.3-V circuitry and I/Os. A second LDO steps the voltage down from LDO_3V3 to LDO_1V5 to power the 1.5-V core digital circuitry. When VIN_3V3 power is unavailable and power is available on VBUS, it is referred to as the dead-battery start-up condition. In a dead-battery start-up condition, the TPS26750 opens the VIN_3V3 switch until the host clears the dead-battery flag through I²C. Therefore, the TPS26750 is powered from the VBUS input with the higher voltage during the dead-battery start-up condition and until the dead-battery flag is cleared. When powering from a VBUS input, the voltage on VBUS is stepped down through an LDO to LDO_3V3.