SLVSBE9E April 2012 – June 2015 TPS27081A
PRODUCTION DATA.
PIN | I/O(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
ON/OFF | 5 | I | Active high enable. When driven with a high-impedance driver, connect an external pull down resistor to GND |
R1/C1 | 6 | I | Gate terminal of power PFET (Q1) |
R2 | 1 | O | Source terminal of NMOS (Q2) . Connect to system GND directly or through a slew rate control resistor |
VIN | 4 | I | Source terminal of power PFET (Q1). Connect a pull-up resistor between the pins VIN/R1 and R1/C1 |
VOUT | 2 | O | Drain terminal of power PFET (Q1). Connect a slew control capacitor between pins VOUT and R1/C1 |
3 |