The device includes an internal ADC that can convert the current sense, temperature sense, input and output voltages. The ADC reference voltage is fixed internally as shown in the electrical characteristics table.

The TPS274C65AS device has a successive approximation 10-bit ADC which can convert multiple channels serially. The ADC can be used to convert the following (but each or all of these can be disabled using SPI register configuration.

1. Sensed load current. The sense resistor converting the sense current to voltage should be sized such that the max load current (including the 20% over the nominal load value) produces a voltage value at the SNS pin (V_ISNS) that falls roughly at 80% of the ADC range. In this case, if ISNS is at the upper end of the ADC range, the device ADC output indicates that there is an over-load condition, and if ISNS is in the lower end of the ADC range, they know that there is an under-load condition. However, given the very low current values that need to be diagnosed, additional scaling of the V_ISNS voltage or the sensed current may be needed at the very low current limit. Note that the current output occurs only when the switch is enabled ON. The V_ISNS voltage would be sampled by the MUX switch only when the switch is fully ON (switch enable digital signal gated with the ISNS_DELAY signal from) allowing the SNS current to settle. The four-sample average would be done only after the MUX switch is ON. The ADC ISNS reports FF as the output value.

   Equation 8. ADC_current in decimal = round[(2^{number of ADC bits}-1)*I_load*R_SNS/(K_SNS*V_ADCREF)]

2. VS/VOUT voltage signals applied to the general purpose ADC pins. Note that the VOUT voltage need only be sensed as a fraction of the VS voltage.

   Equation 9. ADC_voltage in decimal = round[(2^{number of ADC bits}-1)*V_S/OUT/30]

   where V_S/OUT can be either V_S or V_OUT

3. Temperature sensed in each FET.

   Equation 10. ADC_temp in decimal = round[(2^{number of ADC bits}-1)*(0.83-T_IC/450)]

   where T_IC is in ℃

The ADC’s reference voltage pin is ADREFHI which is generated internally thus making the max voltage convertible to the ADCREFHI. Internally the ADC’s ground reference is connected to the IC GND pin, so externally should be connected to the same pin to minimize the PCB ground shift errors.

The ADC scheduling is round robin with the following order:

1. ISNS

2. TSNS

3. VOUT_SNS

4. VSNS.

Figure 8-39 ADC Block Diagram