米6体育平台手机版

SLVS227G August 1999 – June 2024

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted).

PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
R_MR	MR pullup resistor (internal)					27		kΩ
I_IH	High-level input current	WDI	WDI = V_DD = 3.3V		1		1	μA
I_IH	High-level input current	MR	MR = 0.7 × V_DD,	V_DD = 3.3V	20		55	μA
I_IL	Low-level input current	WDI	WDI = 0V,	V_DD = 3.3V	1		1	μA
I_IL	Low-level input current	MR	MR = 0V,	V_DD = 3.3V	80		170	μA
I_OH	High-level output current (leakage into RESET pin)	TPS3126-xx, TPS3128-xx	V_DD = V_OH = 3.3V				200	nA
V_OH	High-level output voltage (TPS3123/4/5 only)	RESET	V_DD = 1.5V,	I_OH = –1mA	0.8×V_DD			V
		RESET	V_DD = 3.3V,	I_OH = –4.5mA
		RESET	V_DD = 0.75V,	I_OH = –8 μA
		RESET	V_DD = 1.5V,	I_OH = –1mA
V_OL	Low-level output voltage	RESET	V_DD = 0.75V,	I_OL = 15μA			0.2 × V_DD	V
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 3.3V,	I_OL = 3mA			0.4
V_IT–	Negative-going input threshold voltage ⁽¹⁾	TPS312xJ12	T_A = –40°C to +85°C		1.04	1.08	1.12	V
		TPS312xG15			1.35	1.40	1.45
		TPS312xJ18			1.56	1.62	1.68
		TPS312xL30			2.57	2.64	2.71
		TPS312xE12			1.10	1.14	1.18
		TPS312xE15			1.38	1.43	1.48
		TPS312xE18			1.65	1.71	1.77
V_HYS	Hysteresis at V_DD input		1V < V_IT– < 1.4V			15		mV
			1.4V < V_IT– < 2V			20
			2V < V_IT– < 3V			30
I_DD	Supply current	TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 0.75V		14		μA
		TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 3.3V		22	30
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 0.75V		14
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 3.3V		18	25
C_i	Input capacitance at MR, WDI		V_I = 0V to 3.3V			5		pF

(1) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1μF) should be placed near the supply terminal.

(2) The supply current during delay time t_d is typical 5μA higher.

PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
R_MR	MR pullup resistor (internal)					27		kΩ
I_IH	High-level input current	WDI	WDI = V_DD = 3.3V		1		1	μA
I_IH	High-level input current	MR	MR = 0.7 × V_DD,	V_DD = 3.3V	20		55	μA
I_IL	Low-level input current	WDI	WDI = 0V,	V_DD = 3.3V	1		1	μA
I_IL	Low-level input current	MR	MR = 0V,	V_DD = 3.3V	80		170	μA
I_OH	High-level output current (leakage into RESET pin)	TPS3126-xx, TPS3128-xx	V_DD = V_OH = 3.3V				200	nA
V_OH	High-level output voltage (TPS3123/4/5 only)	RESET	V_DD = 1.5V,	I_OH = –1mA	0.8×V_DD			V
		RESET	V_DD = 3.3V,	I_OH = –4.5mA
		RESET	V_DD = 0.75V,	I_OH = –8 μA
		RESET	V_DD = 1.5V,	I_OH = –1mA
V_OL	Low-level output voltage	RESET	V_DD = 0.75V,	I_OL = 15μA			0.2 × V_DD	V
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 3.3V,	I_OL = 3mA			0.4
V_IT–	Negative-going input threshold voltage ⁽¹⁾	TPS312xJ12	T_A = –40°C to +85°C		1.04	1.08	1.12	V
		TPS312xG15			1.35	1.40	1.45
		TPS312xJ18			1.56	1.62	1.68
		TPS312xL30			2.57	2.64	2.71
		TPS312xE12			1.10	1.14	1.18
		TPS312xE15			1.38	1.43	1.48
		TPS312xE18			1.65	1.71	1.77
V_HYS	Hysteresis at V_DD input		1V < V_IT– < 1.4V			15		mV
			1.4V < V_IT– < 2V			20
			2V < V_IT– < 3V			30
I_DD	Supply current	TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 0.75V		14		μA
		TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 3.3V		22	30
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 0.75V		14
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 3.3V		18	25
C_i	Input capacitance at MR, WDI		V_I = 0V to 3.3V			5		pF

PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
R_MR	MR pullup resistor (internal)					27		kΩ
I_IH	High-level input current	WDI	WDI = V_DD = 3.3V		1		1	μA
I_IH	High-level input current	MR	MR = 0.7 × V_DD,	V_DD = 3.3V	20		55	μA
I_IL	Low-level input current	WDI	WDI = 0V,	V_DD = 3.3V	1		1	μA
I_IL	Low-level input current	MR	MR = 0V,	V_DD = 3.3V	80		170	μA
I_OH	High-level output current (leakage into RESET pin)	TPS3126-xx, TPS3128-xx	V_DD = V_OH = 3.3V				200	nA
V_OH	High-level output voltage (TPS3123/4/5 only)	RESET	V_DD = 1.5V,	I_OH = –1mA	0.8×V_DD			V
		RESET	V_DD = 3.3V,	I_OH = –4.5mA
		RESET	V_DD = 0.75V,	I_OH = –8 μA
		RESET	V_DD = 1.5V,	I_OH = –1mA
V_OL	Low-level output voltage	RESET	V_DD = 0.75V,	I_OL = 15μA			0.2 × V_DD	V
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 3.3V,	I_OL = 3mA			0.4
V_IT–	Negative-going input threshold voltage ⁽¹⁾	TPS312xJ12	T_A = –40°C to +85°C		1.04	1.08	1.12	V
		TPS312xG15			1.35	1.40	1.45
		TPS312xJ18			1.56	1.62	1.68
		TPS312xL30			2.57	2.64	2.71
		TPS312xE12			1.10	1.14	1.18
		TPS312xE15			1.38	1.43	1.48
		TPS312xE18			1.65	1.71	1.77
V_HYS	Hysteresis at V_DD input		1V < V_IT– < 1.4V			15		mV
			1.4V < V_IT– < 2V			20
			2V < V_IT– < 3V			30
I_DD	Supply current	TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 0.75V		14		μA
		TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 3.3V		22	30
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 0.75V		14
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 3.3V		18	25
C_i	Input capacitance at MR, WDI		V_I = 0V to 3.3V			5		pF

PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
R_MR	MR pullup resistor (internal)					27		kΩ
I_IH	High-level input current	WDI	WDI = V_DD = 3.3V		1		1	μA
I_IH	High-level input current	MR	MR = 0.7 × V_DD,	V_DD = 3.3V	20		55	μA
I_IL	Low-level input current	WDI	WDI = 0V,	V_DD = 3.3V	1		1	μA
I_IL	Low-level input current	MR	MR = 0V,	V_DD = 3.3V	80		170	μA
I_OH	High-level output current (leakage into RESET pin)	TPS3126-xx, TPS3128-xx	V_DD = V_OH = 3.3V				200	nA
V_OH	High-level output voltage (TPS3123/4/5 only)	RESET	V_DD = 1.5V,	I_OH = –1mA	0.8×V_DD			V
		RESET	V_DD = 3.3V,	I_OH = –4.5mA
		RESET	V_DD = 0.75V,	I_OH = –8 μA
		RESET	V_DD = 1.5V,	I_OH = –1mA
V_OL	Low-level output voltage	RESET	V_DD = 0.75V,	I_OL = 15μA			0.2 × V_DD	V
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 1.5V,	I_OL = 1.4mA
		RESET	V_DD = 3.3V,	I_OL = 3mA			0.4
V_IT–	Negative-going input threshold voltage ⁽¹⁾	TPS312xJ12	T_A = –40°C to +85°C		1.04	1.08	1.12	V
		TPS312xG15			1.35	1.40	1.45
		TPS312xJ18			1.56	1.62	1.68
		TPS312xL30			2.57	2.64	2.71
		TPS312xE12			1.10	1.14	1.18
		TPS312xE15			1.38	1.43	1.48
		TPS312xE18			1.65	1.71	1.77
V_HYS	Hysteresis at V_DD input		1V < V_IT– < 1.4V			15		mV
			1.4V < V_IT– < 2V			20
			2V < V_IT– < 3V			30
I_DD	Supply current	TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 0.75V		14		μA
		TPS3123-xx TPS3124-xx TPS3128-xx	WDI = V_DD, MR unconnected	V_DD = 3.3V		22	30
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 0.75V		14
		TPS3125-xx TPS3126-xx ⁽²⁾	MR unconnected	V_DD = 3.3V		18	25
C_i	Input capacitance at MR, WDI		V_I = 0V to 3.3V			5		pF