SNVSCN9 September 2024 TPS3423 , TPS3424
ADVANCE INFORMATION
5 Pin Configuration and Functions
Figure 5-1 Pin Configuration Option:
TPS3423 DRL Package
8-Pin SOT-5X3
Top View
Figure 5-2 Pin Configuration Option
TPS3423 DRL Package
6-Pin SOT-5X3
Top View
Figure 5-3 Pin Configuration Option
TPS3424 DRL Package
8-Pin SOT-5X3
Top View
Figure 5-4 Pin Configuration Option
TPS3424 DRL Package
6-Pin SOT-5X3
Top View
Table 5-1 TPS3423 - Pin
Functions
| TPS3423 | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| PIN NAME | 8 PIN SOT-5X3 | 6 PIN SOT-5X3 | ||
| PB1 | 1 | 1 | I | Push-button input 1, refer Section 7.3.1.1 for additional details. |
| GND | 2 | 2 | - | Ground connection for IC. |
| VDD | 3 | 3 | I | Supply connection, connect a 0.1µF capacitor near the pin for best performance. |
| INT2 | 4 | O | Interrupt output for push-button input 2, INT2 is open drain active low output which toggles from every short press and long press on push-button input 2 as described in Section 7.3.2.1 | |
| INT1 | 5 | O | Interrupt output for push-button input 1, INT1 is open drain active low output which toggles from every short press and long press on push-button input 1 as described in Section 7.3.2.1 | |
| RESET1/RESET1 | 6 | 4 | O | RESET output for push-button input 1. The response of RESET to short press and long press is described in Section 7.3.2.2. |
| RESET2/RESET2 | 7 | 5 | I | RESET output for push-button input 2. The response of RESET to short press and long press is described in Section 7.3.2.2. |
| PB2 | 8 | 6 | Push-button input 2, refer Section 7.3.1.1 for additional details. | |
Table 5-2 TPS3424 - Pin
Functions
| TPS3424 | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| PIN NAME | 8 PIN SOT-5X3 | 6 PIN SOT-5X3 | ||
| PB | 1 | 1 | I | Push-button input, refer Section 7.3.1.1 for additional details. |
| GND | 2 | 2 | - | Ground connection for IC. |
| VDD | 3 | 3 | I | Supply connection, connect a 0.1µF capacitor near the pin for best performance. |
| SPT | 4 | Connect capacitor to program short press time as described in Section 7.3.1.1 for SPT Cap version. | ||
| LPT | 5 | O | Connect capacitor to program long press time as described in Section 7.3.1.1 for LPT Cap version. | |
| RESET/RESET | 6 | 4 | O | RESET output for the device. The response of RESET to short press and long press is described in Section 7.3.2.2. |
| INT | 7 | 5 | I | Interrupt output. INT is open drain active low output which toggles from every short press and long press on push-button input as described in Section 7.3.2.1 |
| KILL | 8 | 6 | Kill is feedback from the host. RESET can be de-asserted in the latched version by pulling KILL low. Connect this pin to VDD if not used. Please refer Section 7.3.1.3 for additional details. | |