To achieve the latching watchdog feature, an open-drain buffer is connected from WDO to CRST with a small value capacitor connected from the Anode of the buffer connected to CRST to GND. The capacitor should be small value to prevent additional delay when triggering WDO to active low during watchdog fault. A capacitor between 150pF and 5nF is recommended.

In Figure 8-10 below, the latching watchdog feature is shown by causing a watchdog fault and observing WDO. Since no pulse arrive on WDI within the Watchdog Timeout, WDO activates and goes logic low and remains low. To reset the watchdog, the device must be restarted by dropping VDD below V_{DD (min)}.