As illustrated in Figure 8-1 there are three options for setting the watchdog timer. The design specifications in this application require the programmable timing option (external capacitor connected to CWD). When a capacitor is connected to the CWD pin, the watchdog timer is governed by Equation 1. This equation estimation is only valid for ideal capacitors and any temperature or voltage derating must be accounted for separately.

The nearest standard capacitor value is 2.7 nF. Selecting 2.7 nF for the C_CWD capacitor gives the following minimum and maximum timing parameters:

Capacitor tolerance also influences t_WD(MIN) and t_WD(MAX). Select a ceramic COG dielectric capacitor for high accuracy. For 2.7 nF, COG capacitors are readily available with 5% tolerances. This selection results in a 5% decrease in t_WD(MIN) and a 5% increase in t_WD(MAX), giving 213.16 ms and 318.75 ms, respectively. To ensure proper functionality, a falling edge must be issued before t_WD(min). Figure 8-8 illustrates that a WDI signal with a period of 260 ms keeps WDO from asserting.