ZHCSRF8 December 2022 TPS3435
PRODUCTION DATA
PIN NAME | PIN NUMBER | I/O | DESCRIPTION | ||||
---|---|---|---|---|---|---|---|
PINOUT A | PINOUT B | PINOUT C | PINOUT J | PINOUT K | |||
CRST | 3 | 3 | — | — | 2 | I | Programmable WDO assert time pin. Connect a capacitor between this pin and GND to program the WDO assert time period. See Section 8.3.3 for more details. |
CWD | 2 | 2 | — | — | 1 | I | Programmable watchdog timeout input. Watchdog timeout is set by connecting a capacitor between this pin and ground. See Section 8.3.1.1 for more details. |
GND | 4 | 4 | 4 | 4 | 4 | — | Ground pin |
MR | 1 | — | 2 | — | — | I | Manual reset pin. A logic low on this pin asserts the WDO output. See Section 8.3.2 for more details. |
WDO | 7 | 7 | 7 | 5 | 5 | O | Watchdog output. Connect WDO to VDD using pull up resistance when using open drain output. WDO is asserted when a watchdog error occurs or MR pin is driven LOW. See Section 8.3.3 for more details. |
SET0 | 5 | 1 | 1 | 1 | — | I | Logic input. SET0, SET1, and WD-EN pins select the watchdog timer scaling and enable-disable the watchdog; see Section 8.3.1.4 for more details. |
SET1 | — | 5 | 5 | — | — | I | Logic input. SET0, SET1, and WD-EN pins select the watchdog timer scaling and enable-disable the watchdog; see Section 8.3.1.4 for more details. |
VDD | 8 | 8 | 8 | 6 | 6 | I | Supply voltage pin. For noisy systems, connecting a 0.1-µF bypass capacitor is recommended. |
WD-EN | — | — | 6 | 2 | — | I | Logic input. Logic high input enables the watchdog monitoring feature. See Section 8.3.1.2 for more details. |
WDI | 6 | 6 | 3 | 3 | 3 | I | Watchdog input. A falling transition (edge) must occur at this pin before the timeout expires in order for WDO to not assert. See Section 8.3.1 for more details. |