ZHCSIZ9D November   2018  – March 2021 TPS3703-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VDD
      2. 8.3.2 SENSE
      3. 8.3.3 RESET
      4. 8.3.4 Capacitor Time (CT)
      5. 8.3.5 Manual Reset ( MR)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation (VDD > VDD(MIN))
      2. 8.4.2 Undervoltage Lockout (VPOR < VDD < UVLO)
      3. 8.4.3 Power-On Reset (VDD < VPOR)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Voltage Threshold Accuracy
      2. 9.1.2 CT Reset Time Delay
        1. 9.1.2.1 Factory-Programmed Reset Delay Timing
        2. 9.1.2.2 Programmable Reset Delay-Timing
      3. 9.1.3 RESET Latch Mode
      4. 9.1.4 Adjustable Voltage Thresholds
      5. 9.1.5 Immunity to SENSE Pin Voltage Transients
        1. 9.1.5.1 Hysteresis
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1: Multi-Rail Window Monitoring for Microcontroller Power Rails
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2: RESET Latch Mode
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Guidelines
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Evaluation Module
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9.2.2.3 Application Curves

GUID-F691E155-BE22-487E-9F2D-0DBB4BE8CF35-low.gif
VSENSE ramp from 0 V to 1.4V, VDD = 3.3 V, VCT = 0 V VRESET = VDD = 3.3 V, TPS3703A4120
Figure 9-12 TPS3703-Q1 SENSE Ramp Latch Function
GUID-AD13FBDA-E95D-42EF-8C7D-83374E0770FF-low.gif
VSense ramp from 0 V to 1.4 V , VDD = 3.3 V, VRESET = VDD CT is pulled down after RESET is low, RESET becomes latched TPS3703A4120
Figure 9-14 TPS3703-Q1 Overvoltage and Undervoltage Latch Function
GUID-5944D852-EC88-4E69-9F99-01DA42AC02C7-low.gif
VCT biased at least to 1.15 V , VSENSE = 1.2 V VRESET = VDD = 3.3 V, TPS3703A4120
Figure 9-13 TPS3703-Q1 CT Bias Unlatch Function
GUID-1FD78B64-BE61-4B14-9E3F-99625087E124-low.gif
VDD ramp up from 0 V to 3.3 V , VSENSE = 1.2 V, CT = 0 V VRESET = VDD = 3.3 V, TPS3703A4120
Figure 9-15 TPS3703-Q1 VDD Ramp Latch Function
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