In a typical TPS3703-Q1 application, the RESET output is connected to a reset or enable input of a processor [such as a digital signal processor (DSP), application-specific integrated circuit (ASIC), or other processor type] or the enable input of a voltage regulator [such as a DC-DC converter or low-dropout regulator (LDO)].

The TPS3703-Q1 has an open drain active low output that requires a pull-up resistor to hold these lines high to the required voltage logic. Connect the pull-up resistor to the proper voltage rail to enable the output to be connected to other devices at the correct interface voltage levels. To ensure proper voltage levels, give some consideration when choosing the pull-up resistor values. The pull-up resistor value is determined by V_OL, output capacitive loading, and output leakage current. These values are specified in Section 7. The open drain output can be connected as a wired-OR logic with other open drain signals such as another TPS3703-Q1 RESET pin.

Table 8-1 describes the scenarios when the output ( RESET) is either asserted low or high impedance.

Figure 8-1 RESET output