5 Pin Configuration and Functions

Figure 5-1 DDF Package
8-PIN SOT23
TPS37041-Q1 (Top View)

Figure 5-2 DDF Package
8-PIN SOT23
TPS37042-Q1 (Top View)

Figure 5-3 DDF Package
8-PIN SOT23
TPS37043-Q1 (Top View)

Figure 5-4 DDF Package
8-PIN SOT23
TPS37044-Q1 (Top View)

Table 5-1 Pin Functions

PIN					I/O	DESCRIPTION
NAME	TPS37041 -Q1	TPS37042 -Q1	TPS37043 -Q1	TPS37044 -Q1	I/O	DESCRIPTION
VDD	1	1	1	1	I	Supply Input. Bypass with a 0.1-µF capacitor to GND.
SENSE1	2	2	2	2	I	Connect directly to a monitored voltage. RESET1/RESET1 is asserted when SENSE1 falls outside of the window threshold. No external capacitor is required for this SENSE1 pin. For the TPS37044-Q1 (quad version) RESET1/RESET1 asserts when either SENSE1 or SENSE2 fall outside of the window threshold. For noisy applications, placing a 10-nF to 100-nF ceramic capacitor close to this pin may be needed for optimum performance. Leave this pin floating if not used.
SENSE2	—	3	3	3	I	Connect directly to a monitored voltage. RESET2/RESET2 is asserted when SENSE2 falls outside of window threshold. No external capacitor is required for the SENSE2 pin. For the TPS37044-Q1 (quad version) RESET1/RESET1 asserts when either SENSE1 or SENSE2 fall outside of the window threshold. For noisy applications, placing a 10-nF to 100-nF ceramic capacitor close to this pin may be needed for optimum performance. Leave this pin floating if not used.
SENSE3	—	—	5	5	I	Connect directly to monitored voltage. RESET3/RESET3 is asserted when SENSE3 falls outside of window threshold. No external capacitor is required for SENSE3 pin. For TPS37044-Q1 (quad version) RESET2/RESET2 asserts when either SENSE3 or SENSE4 falls outside of window threshold. For noisy applications, placing a 10-nF to 100-nF ceramic capacitor close to this pin may be needed for optimum performance. If the input pin is not being used, it can be left floating.
SENSE4	—	—	—	6	I	Connect directly to a monitored voltage. For TPS37044-Q1 (quad version) RESET2/RESET2 asserts when either SENSE3 or SENSE4 fall outside of the window threshold. For noisy applications, placing a 10-nF to 100-nF ceramic capacitor close to this pin may be needed for optimum performance. Leave this pin floating if not used.
RESET1	8	8	8	8	O	RESET1/RESET1 asserts when SENSE1 falls outside of the overvoltage or undervoltage threshold window. RESET1/RESET1 stays asserted for the reset timeout period after SENSE1 fall back within the window threshold. Active-low, open-drain reset output, requires an external pullup resistor. For the TPS37044-Q1, RESET1/RESET1 asserts when either SENSE1 or SENSE2 falls outside of the window threshold. Leave this pin floating if not used. For the TPS37044F-Q1 option, any SENSEx channels that detect an overvoltage (OV) fault, this pin is asserted.
RESET2	—	7	7	7	O	RESET2/RESET2 asserts when SENSE2 falls outside of the overvoltage or undervoltage threshold window. RESET2/RESET2 stays asserted for the reset timeout period after SENSE2 falls back within the window threshold. Active-low, open-drain reset output, requires an external pullup resistor. For the TPS37044-Q1, RESET2/RESET2 asserts when either SENSE3 or SENSE4 fall outside of the window threshold. Leave this pin floating if not used. For the TPS37044F-Q1 option, any SENSEx channels that detect an undervoltage (UV) fault, this pin is asserted.
RESET3	—	—	6	—	O	RESET3/RESET3 asserts when SENSE3 falls outside of the overvoltage or undervoltage threshold window. RESET3/RESET3 stays asserted for the reset timeout period after SENSE3 falls back within the window threshold. Active-low, open-drain reset output, requires an external pullup resistor. Leave this pin floating if not being used.
GND	4	4	4	4	—	Ground
NC	3,5,6,7	5,6	—	—	—	No connect