米6体育平台手机版

ZHCSNK5B March 2021 – November 2023 TPS3704-Q1

PRODUCTION DATA

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机械数据 (封装 | 引脚)

DDF|8
- MPDS569D

散热焊盘机械数据 (封装 | 引脚)

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6.6 Timing Requirements

At 1.7 V ≤ V_DD ≤ 6.0 V, RESETx voltage (V_RESETx) = 10 kΩ to V_DD, RESETx load = 10 pF, and over the operating free-air temperature range of – 40°C to 125°C, unless otherwise noted. Typical values are at T_A = 25°C, typical conditions at V_DD = 3.3 V.

PARAMETER		TEST CONDITIONS	MIN	NOM	MAX	UNIT
t_D	Reset release time delay	Fixed delay option t_D < 4 ms, overdrive = 10%	-40	t_D	40	%
t_D	Reset release time delay	Fixed delay option t_D > 5 ms, overdrive = 10%	-30	t_D	30	%
t_PD	Propagation detect delay ⁽¹⁾	Fixed time delay t_D > 1 ms, overdrive 10%			10	µs
t_GI(VIT-)	Glitch Immunity Undervoltage (5% overdrive) ⁽²⁾			2		µs
t_GI(VIT+)	Glitch Immunity Overvoltage (5% overdrive) ⁽²⁾			2		µs
t_R	Ouptut rise (Push-Pull) ⁽²⁾ ⁽³⁾			25		ns
t_R	Output rise time (Open-Drain) ⁽²⁾ ⁽³⁾			2.2		µs
t_F	Output fall time ⁽²⁾ ⁽³⁾			0.2		µs
t_STRT	Startup delay ⁽⁴⁾			1		ms

(1) t_PD measured from threshold trip point (V_IT-(UV) orV_IT+(OV)) to RESETx V_OL voltage

(2) 5% Overdrive from threshold. Overdrive % = [(V_SENSEx - V_IT) / V_IT]; Where V_IT stands for V_IT-(UV)orV_IT+(OV)

(3) Output transitions from V_OL to V_OHor (V_RESETx)for rise times and V_OH or (V_RESETx) to V_OL for fall times.

(4) During the power-on sequence, V_DD must be at or above V_DD(MIN) for at least t_STRT + t_D before the output is in the correct state. when VDD is between V_DD(MIN) and VPOR the RESETx pin will be engaged