ZHCSDS9 April   2015 TPS3779 , TPS3780

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Inputs (SENSE1, SENSE2)
      2. 8.3.2 Outputs (OUT1, OUT2)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation (VDD ≥ VDD(min))
      2. 8.4.2 Power-On Reset (VDD < V(POR))
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Threshold Overdrive
      2. 9.1.2 Sense Resistor Divider
    2. 9.2 Typical Applications
    3. 9.3 Monitoring Two Separate Rails
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curve
    4. 9.4 Early Warning Detection
      1. 9.4.1 Design Requirements
      2. 9.4.2 Detailed Design Procedure
      3. 9.4.3 Application Curve
  10. 10Power-Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 开发支持
        1. 12.1.1.1 评估模块
        2. 12.1.1.2 Spice 模型
      2. 12.1.2 器件命名规则
    2. 12.2 文档支持
      1. 12.2.1 相关文档
        1. 12.2.1.1 相关文档　
    3. 12.3 相关链接
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage VDD –0.3 7 V
OUT1, OUT2 (TPS3779 only) –0.3 VDD + 0.3 V
OUT1, OUT2 (TPS3780 only) –0.3 7 V
SENSE1, SENSE2 –0.3 7 V
Current OUT1, OUT2 ±20 mA
Temperature Operating junction, TJ –40 125 °C
Storage, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Power-supply voltage 1.5 6.5 V
Sense voltage SENSE1, SENSE2 0 6.5 V
Output voltage (TPS3779 only) OUT1, OUT2 0 VDD + 0.3 V
Output voltage (TPS3780 only) OUT1, OUT2 0 6.5 V
RPU Pullup resistor (TPS3780 only) 1.5 10,000 kΩ
Current OUT1, OUT2 –5 5 mA
CIN Input capacitor 0.1 µF
TJ Junction temperature –40 25 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS3779, TPS3780 UNIT
DRY (USON) DBV (SOT23-6)
6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 306.7 193.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 174.1 134.5
RθJB Junction-to-board thermal resistance 173.4 39.0
ψJT Junction-to-top characterization parameter 30.9 30.4
ψJB Junction-to-board characterization parameter 171.6 38.5
RθJC(bot) Junction-to-case (bottom) thermal resistance 65.2 N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, .

7.5 Electrical Characteristics

All specifications are over the operating temperature range of –40°C < TJ < 125°C and 1.5 V ≤ VDD ≤ 6.5 V, unless otherwise noted. Typical values are at TJ = 25°C and VDD = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VDD Input supply range 1.5 6.5 V
V(POR) Power-on reset voltage(1) VOL (max) = 0.2 V, IOL = 15 µA 0.8 V
IDD Supply current (into VDD pin) VDD = 3.3 V, no load, –40°C < TJ < 85°C 2.09 3.72 µA
VDD = 3.3 V, no load, –40°C < TJ < 125°C 5.80 µA
VDD = 6.5 V, no load, –40°C < TJ < 85°C 2.29 4.00 µA
VDD = 6.5 V, no load, –40°C < TJ < 125°C 6.50 µA
VIT+ Positive-going input threshold voltage V(SENSE) rising 1.194 V
–1% 1%
VIT– Negative-going input threshold voltage V(SENSE) falling TPS37xxA
(0.5% hysteresis)		 1.188 V
TPS37xxB
(5% hysteresis)		 1.134 V
TPS37xxC
(10% hysteresis)		 1.074 V
TPS37xxD
(1% hysteresis)		 1.182 V
V(SENSE) falling –1% 1%
I(SENSE) Input current V(SENSE) = 0 V or VDD –15 15 nA
VOL Low-level output voltage VDD ≥ 1.2 V, ISINK = 0.4 mA 0.25 V
VDD ≥ 2.7 V, ISINK = 2 mA 0.25 V
VDD ≥ 4.5 V, ISINK = 3.2 mA 0.30 V
VOH High-level output voltage
(TPS3779 only)		 VDD ≥ 1.5 V, ISOURCE = 0.4 mA 0.8 VDD V
VDD ≥ 2.7 V, ISOURCE = 1 mA 0.8 VDD V
VDD ≥ 4.5 V, ISOURCE = 2.5 mA 0.8 VDD V
Ilkg(OD) Open-drain output leakage current (TPS3780 only) High impedance, V(SENSE) = V(OUT) = 6.5 V,
–40°C < TJ < 85°C		 –50 50 nA
High impedance, V(SENSE) = V(OUT) = 6.5 V,
–40°C < TJ < 125°C		 –250 250 nA
(1) Outputs are undetermined below V(POR).

7.6 Timing Requirements

Typical values are at TJ = 25°C and VDD = 3.3 V. SENSE transitions between 0 V and 1.3 V.
MIN NOM MAX UNIT
tPD(r) SENSE (rising) to OUT propagation delay 5.5 µs
tPD(f) SENSE (falling) to OUT propagation delay 10 µs
tSD Startup delay(1) 570 µs
(1) During power-on or a VDD transient below VDD(min), the outputs reflect the input conditions 570 µs after VDD transitions through VDD(min).
TPS3779 TPS3780 timing_di_sbvs250.gifFigure 1. Timing Diagram

7.7 Typical Characteristics

At TJ = 25°C with a 0.1-µF capacitor close to VDD, unless otherwise noted.
TPS3779 TPS3780 D001_SBVS250.gif
SENSE1 = SENSE2 = 1.5 V
Figure 2. Supply Current vs Supply Voltage
TPS3779 TPS3780 D003_SBVS250.gif
Figure 4. Sense Threshold (VIT–) Deviation vs Temperature
TPS3779 TPS3780 D018_SBVS250.gif
VDD = 6.5 V
Figure 6. Sense Threshold (VIT–)
TPS3779 TPS3780 D005_SBVS250.gif
Figure 8. Output Voltage Low vs Output Current
(VDD = 3.3 V)
TPS3779 TPS3780 D007_SBVS250.gif
Figure 10. Output Voltage High vs Output Current
(VDD = 1.5 V)
TPS3779 TPS3780 D009_SBVS250.gif
Figure 12. Output Voltage High vs Output Current
(VDD = 6.5 V)
TPS3779 TPS3780 D012_SBVS250.gif
SENSE1 = SENSE2 = 1.3 V to 0 V
Figure 14. Propagation Delay from
Sense Low to Output Low
TPS3779 TPS3780 D013_SBVS250.gif
High-to-low transition occurs above the curve
Figure 16. Minimum Transient Duration (HL) vs Overdrive (VDD = 1.5 V)
TPS3779 TPS3780 D015_SBVS250.gif
Low-to-high transition occurs above the curve
Figure 18. Minimum Transient Duration (LH) vs Overdrive (VDD = 1.5 V)
TPS3779 TPS3780 D002_SBVS250.gif
Figure 3. Sense Threshold (VIT+) Deviation vs Temperature
TPS3779 TPS3780 D017_SBVS250.gif
VDD = 6.5 V
Figure 5. Sense Threshold (VIT+)
TPS3779 TPS3780 D004_SBVS250.gif
Figure 7. Output Voltage Low vs Output Current
(VDD = 1.5 V)
TPS3779 TPS3780 D006_SBVS250.gif
Figure 9. Output Voltage Low vs Output Current
(VDD = 6.5 V)
TPS3779 TPS3780 D008_SBVS250.gif
Figure 11. Output Voltage High vs Output Current
(VDD = 3.3 V)
TPS3779 TPS3780 D010_SBVS250.gif
SENSE1 = SENSE2 = 0 V to 1.3 V
Figure 13. Propagation Delay from
Sense High to Output High
TPS3779 TPS3780 D011_SBVS250.gif
Figure 15. Startup Delay
TPS3779 TPS3780 D014_SBVS250.gif
High-to-low transition occurs above the curve
Figure 17. Minimum Transient Duration (HL) vs Overdrive (VDD = 6.5 V)
TPS3779 TPS3780 D016_SBVS250.gif
Low-to-high transition occurs above the curve
Figure 19. Minimum Transient Duration (LH) vs Overdrive (VDD = 6.5 V)
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