SLVS331J December   2000  – August 2024 TPS3813

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Dissipation Ratings
    9. 6.9 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Voltage (VDD)
        1. 7.3.1.1 VDD Hysteresis
        2. 7.3.1.2 VDD Glitch Immunity
      2. 7.3.2 User-Programmable Watchdog Timer (WDI)
      3. 7.3.3 RESET Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation (VDD > VIT)
      2. 7.4.2 Above Power-On Reset But Less Than Threshold (VPOR < VDD < VIT)
      3. 7.4.3 Below Power-On Reset (VDD < VPOR)
    5. 7.5 Programming
      1. 7.5.1 Implementing Window-Watchdog Settings
      2. 7.5.2 Programmable Window-Watchdog by Using an External Capacitor
      3. 7.5.3 Lower Boundary Calculation
      4. 7.5.4 Watchdog Software Considerations
      5. 7.5.5 Power-Up Considerations
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Related Links
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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Electrical Characteristics

Over recommended operating free-air temperature range (unless otherwise noted).
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VOLLow-level output voltageVDD = 2V to 6V, IOL = 500µA0.2V
VDD = 3.3V IOL = 2mA0.4
VDD = 6V, IOL = mA0.4
VPORPower up reset voltage (1)VDD ≥ 1.1V, IOL = 50µA0.2V
VITNegative-going input threshold
voltage (2)
TPS3813J25TA = –40°C to +85°C2.22.252.3V
TPS3813L302.582.642.7
TPS3813K332.872.933
TPS3813I504.454.554.65
VHYSHysteresisTPS3813J2530mV
TPS3813L3035
TPS3813K3340
TPS3813I5060
IIHHigh-level input currentWDI, WDRWDI = VDD = 6V, WDR = VDD = 6V–2525nA
WDTWDT = VDD = 6V, VDD > VIT, RESET = High–100100
IILLow-level input currentWDI, WDRWDI = 0V, WDR = 0V, VDD = 6V–2525
WDTWDT = 0V, VDD > VIT,RESET = High–100100
IOHHigh-level output currentVDD = VIT + 0.2V, VOH = VDD25nA
IDDSupply currentVDD = 2V output unconnected913µA
VDD = 5V output unconnected2025
CiInput capacitanceVI = 0V to VDD5pF
The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15µs/V.
To provide best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1µF) must be placed near to the supply terminals.