SLVS292F June 2000 – September 2019 TPS3836 , TPS3837 , TPS3838
PRODUCTION DATA.
请参考 PDF 数据表获取器件具体的封装图。
Manual reset is an active-low logic input that when MR is logic low, the reset output asserts to the active state after the propagation delay: tPHL for TPS3836 and TPS3838, TPLH for TPS3837. Once MR is logic high and VDD is above VIT, the reset output deasserts to an inactive state after the reset delay time, tD. As previously noted, the VDD and MR pins have different propagation delays with the same label.