ZHCSCT8A August   2014  – March 2015 TPS3847

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ultralow Supply Current
      2. 7.3.2 Wide Supply Range
      3. 7.3.3 High-Accuracy Negative Threshold
      4. 7.3.4 Push-Pull Output
      5. 7.3.5 Manual Reset (MR) Input
      6. 7.3.6 VCC Transient Rejection
      7. 7.3.7 Controlled Startup Current
      8. 7.3.8 Low Minimum Supply Voltage for Valid Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input Capacitor
        2. 8.2.1.2 Driving Bidirectional Reset Pins
        3. 8.2.1.3 Manual Reset (MR) Input
        4. 8.2.1.4 Threshold Overdrive
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 器件命名规则
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating junction temperature range (unless otherwise noted)
MIN MAX UNIT
Voltage VCC –0.3 +20 V
MR –0.3 VCC + 0.3 V
RESET –0.3 +5.5 V
Current RESET 10 mA
Temperature(2) Operating junction, TJ –40 +105 °C
Storage, Tstg –65 +150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) As a result of the low dissipated power in this device, it is assumed that the junction temperature is equal to the ambient temperature.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V(VCC) Power supply voltage 4.5 18 V
V(MR) MR pin voltage 0 1.2 VCC V
V(RESET) RESET pin voltage 0 5 V
I(RESET) RESET pin current 0 2 mA
CIN Input capacitor 0 0.1 µF
TJ Junction temperature –40 +25 +85 °C

6.4 Thermal Information

THERMAL METRIC(1) TPS3847 UNIT
DBV (SOT)
5 PINS
RθJA Junction-to-ambient thermal resistance 208.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 123.3
RθJB Junction-to-board thermal resistance 37.2
ψJT Junction-to-top characterization parameter 14.6
ψJB Junction-to-board characterization parameter 36.3
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At TJ = –40°C to +85°C, 4.5 V < VCC < 18 V, and CIN = 0.1 µF (unless otherwise noted). Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
V(VCC) Input supply voltage range 4.5 18 V
VVO Minimum V(VCC) voltage for valid output(1) IOL = 1 µA, VOL = 400 mV 0.8 V
I(VCC) Supply current (into VCC pin) Output not connected TJ = 25°C, V(VCC) = 18 V 380 nA
TJ = 25°C 750 nA
–40°C ≤ TJ ≤ +85°C 900 nA
MONITORED THRESHOLD
VIT– Negative going input threshold accuracy TJ = 25°C ±0.5%
–2.5% +2.5%
Negative-going threshold voltage TPS3847085 8.2875 8.5 8.7125 V
TPS3847108 10.53 10.8 11.07 V
VHYS Hysteresis voltage TPS3847085 0.11 × VIT– V
TPS3847108 0.035 × VIT– V
OUTPUT
VOL Push-pull low-level output voltage (RESET) 0.9 V < V(VCC) < 2.4 V, IOL= 10 μA 0.009 0.4 V
2.4 V ≤ V(VCC) < 4.5 V, IOL= 250 μA 0.015 0.4 V
4.5 V ≤ V(VCC) ≤ 18 V, IOL= 2 mA 0.09 0.4 V
VOH Push-pull high-level output voltage (RESET) IOH = –2 mA 1.6 3.1 V
V(VCC) = 18 V 2.45 V
IOH = –10 µA 3 4 V
V(VCC) = 18 V 3.55 V
MR PIN
VIL Low-level input voltage 0.4 V
VIH High-level input voltage 1.2 V
Ilkg(MR) MR leakage current MR High, V(VCC) = 18 V –23 nA
(1) The lowest supply voltage (V(VCC)) at which RESET is valid. tRISE(VCC) ≥ 15 µs/V, where tRISE is the rise time.

6.6 Timing Requirements

At TJ = –40°C to +85°C, 4.5 V < VCC < 18 V, and CIN = 0.1 μF (unless otherwise noted). Typical values are at TJ = 25°C.
PARAMETER MIN TYP MAX UNIT
td RESET delay time(1) 4.5 20 ms
td(START) Startup delay time(2) 6.5 40 ms
tpd(VCC) Propagation delay for VCC falling(3) 55 µs
tpd(MR) Propagation delay MR falling(4) 50 µs
tP(MR) MR minimum high to low pulse duration for RESET low 50 µs
(1) Delay from when V(VCC) ≥ VIT– or VMR ≥ VIH until RESET goes high when V(VCC) starts from above the specified minimum V(VCC). Measured with 5% overdrive.
(2) When V(VCC) starts from less than the specified minimum V(VCC) and then exceeds Vth, RESET goes high after the startup delay (td(START)) instead of the RESET delay time (td). Measured with 5% overdrive.
(3) Delay from V(VCC) < Vth until RESET goes low. Measured with 8% overdrive.
(4) Delay from VMR < VIL until RESET goes low. Measured with 8% overdrive.
TPS3847 tim_bvs231.gifTiming Diagram

6.7 Typical Characteristics

At V(VCC) = 18 V, MR = 1.2 V, RESET = open, and CIN = 0.1 µF (unless otherwise noted).
TPS3847 C001_SBVS231.png
Figure 1. Negative-Going Threshold Accuracy
vs Temperature
TPS3847 C013_SBVS231.png
Figure 3. Supply Current vs V(VCC) and Temperature
TPS3847 C005_SBVS231.png
V(VCC) transitions from 0 V to 10 V
Figure 5. Startup Delay Time vs Temperature Distribution
TPS3847 C008_SBVS231.png
V(VCC) = 10 V
Figure 7. MR Threshold vs Temperature
TPS3847 C010_SBVS231.png
Figure 9. High-Level Output Voltage vs Load Current
TPS3847 C002_SBVS231.png
TPS3847085
Figure 2. Hysteresis vs Temperature
TPS3847 C004_SBVS231.png
V(VCC) transitions from 7 V to 10 V
Figure 4. RESET Delay Time vs Temperature Distribution
TPS3847 C006_SBVS231.png
MR transitions from 0.4 V to 1.2 V, V(VCC) = 10 V
Figure 6. MR Delay Time vs Temperature Distribution
TPS3847 C009_SBVS231.png
MR open
Figure 8. Minimum V(VCC) for Valid Output vs Temperature
TPS3847 C011_SBVS231.png
Figure 10. Low-Level Output Voltage vs Load Current
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