Forcing a RESET is dependent on two conditions: the amplitude V_DD is beyond the trip point (ΔV₁ and ΔV₂), and the length of time that the voltage is beyond the trip point (t₁ and t₂). If the voltage is just under the trip point for a long period of time, RESET asserts and the output is pulled low. However, if V_DD is just under the trip point for a few nanoseconds, RESET does not assert and the output remains high. The length of time required for RESET to assert can be changed by increasing the amount V_DD goes under the trip point. If V_DD is under the trip point by 10%, the amount of time required for the comparator to respond is much faster and causes RESET to assert much quicker than when barely under the trip point voltage. Equation 3 shows how to calculate the percentage overdrive.

In Equation 3, V_ITX corresponds to the threshold trip point. If V_DD is exceeding the positive threshold,
V_ITN + V_HYST is used. V_ITN is used when V_DD is falling below the negative threshold. In Figure 8-2, t₁ and t₂ correspond to the amount of time that V_DD is over the threshold; the propagation delay versus overdrive for V_ITN and V_ITN + V_HYST is illustrated in Figure 6-16 and Figure 6-18, respectively.

The TPS3851-Q1 is relatively immune to short positive and negative transients on VDD because of the overdrive voltage curve.

Figure 8-2 Overdrive Voltage