As illustrated in Figure 8-1 there are three options for setting the watchdog timer. The design specifications in this application require the programmable timing option (external capacitor connected to CWD). When a capacitor is connected to the CWD pin, the watchdog timer is governed by Equation 1 for the standard timing version. However, only the standard version is capable of meeting this timing requirement. Equation 1 is only valid for ideal capacitors, any temperature or voltage derating must be accounted for separately.

The nearest standard capacitor value to 2.9 nF is 2.7 nF. Selecting 2.7 nF for the C_CWD capacitor gives the following minimum timing parameters:

Capacitor tolerance also influences t_WD(MIN) and t_WD(MAX). Select a ceramic COG dielectric capacitor for high accuracy. For 2.7 nF, COG capacitors are readily available with 5% tolerances. This selection results in a 5% decrease in t_WD(MIN) and a 5% increase in t_WD(MAX), giving 7.34 ms and 11 ms, respectively. To ensure proper functionality, a falling edge must be issued before t_WD(min). Figure 8-6 illustrates that a WDI signal with a period of 5 ms keeps WDO from asserting.