ZHCSFP1A November   2016  – September 2021 TPS3851

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 RESET
      2. 7.3.2 Manual Reset MR
      3. 7.3.3 UV Fault Detection
      4. 7.3.4 Watchdog Mode
        1. 7.3.4.1 CWD
        2. 7.3.4.2 Watchdog Input WDI
        3. 7.3.4.3 Watchdog Output WDO
        4. 7.3.4.4 SET1
    4. 7.4 Device Functional Modes
      1. 7.4.1 VDD is Below VPOR ( VDD < VPOR)
      2. 7.4.2 Above Power-On-Reset, But Less Than VDD(min) (VPOR ≤ VDD < VDD(min))
      3. 7.4.3 Normal Operation (VDD ≥ VDD(min))
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 CWD Functionality
        1. 8.1.1.1 Factory-Programmed Timing Options
        2. 8.1.1.2 Adjustable Capacitor Timing
      2. 8.1.2 Overdrive Voltage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Monitoring the 1.8-V Rail
        2. 8.2.2.2 Calculating RESET and WDO Pullup Resistor
        3. 8.2.2.3 Setting the Watchdog
        4. 8.2.2.4 Watchdog Disabled During Initialization Period
      3. 8.2.3 Glitch Immunity
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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8.1.1.2 Adjustable Capacitor Timing

Adjustable capacitor timing is achievable by connecting a capacitor to the CWD pin. If a capacitor is connected to CWD, then a 375-nA, constant-current source charges CCWD until VCWD = 1.21 V. Table 8-2 shows how to calculate tWD using Equation 1 and Equation 2 and the SET1 pin. The TPS3851 determines the watchdog timeout with the formulas given in Equation 1 and Equation 2, where CCWD is in nanofarads and tWD is in milliseconds.

Equation 1. tWD(standard) (ms) = 3.23 x CCWD (nF) + 0.381 (ms)
Equation 2. tWD(extended) (ms) = 77.4 x CCWD (nF) + 55 (ms)

The TPS3851 is designed and tested using CCWD capacitors between 100 pF and 1 µF. Note that Equation 1 and Equation 2 are for ideal capacitors, capacitor tolerances vary the actual device timing. For the most accurate timing, use ceramic capacitors with COG dielectric material. If a CCWD capacitor is used, Equation 1 can be used to set tWD for standard timing. Use Equation 2 to calculate tWD for extended timing. Table 8-3 shows the minimum and maximum calculated tWD values using an ideal capacitor for both the standard and extended timing.

Table 8-2 Programmable CWD Timing
INPUT STANDARD TIMING WDT (tWD) EXTENDED TIMING WDT (tWD) UNIT
CWD SET1 MIN TYP MAX MIN TYP MAX
CCWD 0 Watchdog disabled Watchdog disabled
CCWD 1 tWD(std) × 0.905 tWD(std)(1) tWD(std) × 1.095 tWD(ext) × 0.905 tWD(ext)(2) tWD(ext) × 1.095 ms
(1) Calculated from Equation 1 using an ideal capacitor.
(2) Calculated from Equation 2 using an ideal capacitor.
Table 8-3 tWD Values for Common Ideal Capacitor Values
CCWD STANDARD TIMING WDT (tWD) EXTENDED TIMING WDT (tWD) UNIT
MIN(1) TYP MAX(1) MIN(1) TYP MAX(1)
100 pF 0.637 0.704 0.771 56.77 62.74 68.7 ms
1 nF 3.268 3.611 3.954 119.82 132.4 144.98 ms
10 nF 29.58 32.68 35.79 750 829 908 ms
100 nF 292.7 323.4 354.1 7054 7795 8536 ms
1 μF 2923 3230 3537 70096 77455 84814 ms
(1) The minimum and maximum values are calculated using an ideal capacitor.
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