8.2.1.2.1.11 Closing the Feedback Loop, R_Z1, R_P1, R_PZ2, R_SET1, R_SET2, C_Z2, C_P2, and C_PZ1

A graphical method is used to select the compensation components. This is a standard feed-forward buck converter. Its PWM gain is given by Equation 44.

The ramp voltage is 1 V at the UVLO voltage. Because of the feed-forward compensation, the programmed UVLO voltage is the voltage that sets the PWM gain.

The gain of the output LC filter is given by Equation 45.

The PWM and LC gain is Equation 46.

To plot this on a Bode plot, the dc gain must be expressed in dB. The dc gain is equal to KPWM. To express this in dB, take its logarithm and multiply by 20. For this converter, the dc gain is Equation 47.

Also, the pole and zero frequencies should be calculated. A double pole is associated with the LC and a zero is associated with the ESR of the output capacitor. The frequencies where these occur can be calculated using Equation 48 and Equation 49.

These are shown in the Bode plot of Figure 29.

The next step is to establish the required compensation gain to achieve the desired overall system response. The target response is to have the crossover frequency between 1/9 and 1/5 times the switching frequency, in order to have a phase margin greater than 45° and a gain margin greater than 6 dB.

A type-III compensation network, shown in Figure 30, was used for this design. This network gives the best overall flexibility for compensating the converter.

A typical Bode plot for this type of compensation network is shown in Figure 31.

The high-frequency gain and the break (pole and zero) frequencies are calculated using Equation 50 through Equation 55.

Looking at the PWM and LC bode plot, there are a few things which must be done to achieve stability.

1. Place two zeros close to the double pole, e.g., f_Z1 = f_Z2 = 4.3 kHz
2. Place both poles well above the crossover frequency. The crossover frequency was selected as one sixth the switching frequency, f_co1 = 50 kHz, f_P1 = 66 kHz
3. Place the second pole at three times f_co1. This ensures that the overall system gain falls off quickly to give good gain margin, f_p2 = 150 kHz
4. The high-frequency gain should be sufficient to ensure 0 dB at the required crossover frequency, GAIN = –1 × gain of PWM and LC at the crossover frequency, GAIN = 16.9 dB

Using these values and Equation 50 through Equation 55, the Rs and Cs around the compensation network can be calculated.

1. Set R_Z1 = 51 kΩ
2. Calculate R_SET using Equation 50, R_SET = 32.4 kΩ
3. Using Equation 54 and f_z1 = 4.3 kHz, C_PZ1 can be calculated to be 726 pF, C_PZ1= 680 pF
4. f_P1 and Equation 52 yields R_P1 to be a standard value of 3.3 kΩ.
5. The required gain of 16.9 dB and Equation 51 sets the value for R_PZ2. R_PZ2 = 21.5 kΩ.
6. C_Z2 is calculated using Equation 55 and the desired frequency for the second zero, C_Z2 = 1.7 nF, or using standard values, 1.8 nF.
7. Finally, C_P2 is calculated using the second pole frequency and Equation 53; C_P2 = 47 pF.

Using these values, the simulated results are 57° of phase margin at 54 kHz.