ZHCSHA3D NOVEMBER   2009  – March 2018 TPS40303 , TPS40304 , TPS40305

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化应用示意图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Reference
      2. 7.3.2 Enable Functionality, Start-Up Sequence and Timing
      3. 7.3.3 Soft-Start Time
      4. 7.3.4 Oscillator and Frequency Spread Spectrum (FSS)
      5. 7.3.5 Overcurrent Protection
      6. 7.3.6 Drivers
      7. 7.3.7 Prebias Start-Up
      8. 7.3.8 Power Good
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
        1. 7.4.1.1 UVLO
        2. 7.4.1.2 Disable
        3. 7.4.1.3 Calibration
        4. 7.4.1.4 Converting
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Using the TPS40305 for a 12-V to 1.8-V Point-of-Load Synchronous Buck Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency
          3. 8.2.1.2.3  Inductor Selection (L1)
          4. 8.2.1.2.4  Output Capacitor Selection (C12)
          5. 8.2.1.2.5  Peak Current Rating of Inductor
          6. 8.2.1.2.6  Input Capacitor Selection (C8)
          7. 8.2.1.2.7  MOSFET Switch Selection (Q1 and Q2)
          8. 8.2.1.2.8  Bootstrap Capacitor (C6)
          9. 8.2.1.2.9  VDD Bypass Capacitor (C7)
          10. 8.2.1.2.10 BP Bypass Capacitor (C5)
          11. 8.2.1.2.11 Short-Circuit Protection (R11)
          12. 8.2.1.2.12 Feedback Divider (R4, R5)
          13. 8.2.1.2.13 Compensation: (C2, C3, C4, R3, R6)
        3. 8.2.1.3 Application Curves
      2. 8.2.2 A High-Current, Low-Voltage Design Using the TPS40304
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Selecting the Switching Frequency
          2. 8.2.2.2.2  Inductor Selection (L1)
          3. 8.2.2.2.3  Output Capacitor Selection (C12)
          4. 8.2.2.2.4  Peak Current Rating of Inductor
          5. 8.2.2.2.5  Input Capacitor Selection (C8)
          6. 8.2.2.2.6  MOSFET Switch Selection (Q1 and Q2)
          7. 8.2.2.2.7  Bootstrap Capacitor (C6)
          8. 8.2.2.2.8  VDD Bypass Capacitor (C7)
          9. 8.2.2.2.9  BP Bypass Capacitor (C5)
          10. 8.2.2.2.10 Short-Circuit Protection (R11)
          11. 8.2.2.2.11 Feedback Divider (R4, R5)
          12. 8.2.2.2.12 Compensation: (C2, C3, C4, R3, R6)
        3. 8.2.2.3 Application Curves
      3. 8.2.3 A Synchronous Buck Application Using the TPS40303
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1  Selecting the Switching Frequency
          2. 8.2.3.2.2  Inductor Selection (L1)
          3. 8.2.3.2.3  Output Capacitor Selection (C12)
          4. 8.2.3.2.4  Peak Current Rating of Inductor
          5. 8.2.3.2.5  Input Capacitor Selection (C8)
          6. 8.2.3.2.6  MOSFET Switch Selection (Q1 and Q2)
          7. 8.2.3.2.7  Bootstrap Capacitor (C6)
          8. 8.2.3.2.8  VDD Bypass Capacitor (C7)
          9. 8.2.3.2.9  BP Bypass Capacitor (C5)
          10. 8.2.3.2.10 Short-Circuit Protection (R11)
          11. 8.2.3.2.11 Feedback Divider (R4, R5)
          12. 8.2.3.2.12 Compensation: (C2, C3, C4, R3, R6)
        3. 8.2.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 11.2 使用 WEBENCH® 工具创建定制设计
    3. 11.3 文档支持
      1. 11.3.1 相关文档
    4. 11.4 相关链接
    5. 11.5 接收文档更新通知
    6. 11.6 社区资源
    7. 11.7 商标
    8. 11.8 静电放电警告
    9. 11.9 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.5 Overcurrent Protection

Programmable OCP level at LDRV is from 6 mV to 150 mV at room temperature with 3000 ppm temperature coefficient to help compensate for changes in the low-side FET channel resistance as temperature increases. With a scale factor of 2, the actual trip point across the low-side FET is in the range of 12 mV to 300 mV. The accuracy of the internal current source is ±5%. Overall offset voltage, including the offset voltage of the internal comparator and the amplifier for scale factor of 2, is limited to ±8 mV.

Maximum clamp voltage at LDRV is 340 mV to avoid turning on the low-side FET during calibration and in a prebiased condition. The maximum clamp voltage is fixed and it does not change with temperature. If the voltage drop across ROCSET reaches the 340-mV maximum clamp voltage during calibration (no ROCSET resistor included), it disables OC protection. Once disabled, there is no low-side or high-side current sensing.

OCP level at HDRV is fixed at 450 mV with 3000-ppm temperature coefficient to help compensate for changes in the high-side FET channel resistance as temperature increases. OCP at HDRV provides pulse-by-pulse current limiting.

OCP sensing at LDRV is a true inductor valley current detection, using sample and hold. Equation 2 can be used to calculate ROCSET:

Equation 2. TPS40303 TPS40304 TPS40305 deq_rocset_lus964.gif

where

  • IOCSET is the internal current source.
  • VOCLOS is the overall offset voltage.
  • IP-P is the peak-to-peak inductor current.
  • RDS(on) is the drain to source ON-resistance of the low-side FET.
  • IOUT(max) is the trip point for OCP.
  • ROCSET is the resistor used for setting the OCP level.

To avoid overcurrent tripping in normal operating load range, calculate ROCSET using the equation above with:

  • The maximum RDS(ON) at room temperature
  • The lower limit of VOCLOS (–8 mV) and the lower limit of IOCSET (9.5 µA) from the Electrical Characteristics table.
  • The peak-to-peak inductor current IP-P at minimum input voltage

Overcurrent is sensed across both the low-side FET and the high-side FET. If the voltage drop across either FET exceeds the OC threshold, a count increments one count. If no OC is detected on either FET, the fault counter decrements by one count. If three OC pulses are summed, a fault condition is declared which cycles the soft-start function in a hiccup mode. Hiccup mode consists of four dummy soft-start timeouts followed by a real one if overcurrent condition is encountered during normal operation, or five dummy soft-start timeouts followed by a real one if overcurrent condition occurs from the beginning during start. This cycle continues indefinitely until the fault condition is removed.
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