This application requires a bootstrap capacitor connected between the BOOT1 pin and the SW1 pin and between the BOOT2 pin and the SW2 pin. The value of the bootstrap capacitor depends on the total gate charge of the high-side MOSFET and the amount of droop allowed on the bootstrap capacitor.

Equation 39.

For this application, a standard value of 100 nF is chosen for the capacitors C₁ and C₅. In addition, series resistors (R1 and R4) are added to reduce the turn on speed of the high-side MOSFET and control the ringing. This resistor has only a limited effect because at the beginning of the HDRVx gate pulse, when the absolute value of gate voltage is still less than BP6, most of the gate current comes directly from BP6 instead of from the BOOT capacitor.