The TPS4022 device has two on-board linear regulators to provide suitable power for the internal circuitry of the device. These pins, BP3 and BP6 must be properly bypassed in function properly. BP3 needs a minimum of 100 nF connected to AGND and BP6 should have approximately 1 µF of capacitance connected to PGND.

It is permissible to use the external regulator to power other circuits if desired, but ensure that the loads placed on the regulators do not adversely affect operation of the controller. The main consideration is to avoid loads with heavy transient currents that can affect the regulator outputs. Transient voltages on these outputs could result in noisy or erratic operation of the device.

Current limits must also be observed. Shorting the BP3 pin to GND damages the BP3 regulator. The BP3 regulator input comes from the BP6 regulator output. The BP6 regulator can supply 120 mA so the total current drawn from both regulators must be less than that. This total current includes the device operating current I_VDD plus the gate drive current required to drive the power FETs. The total available current from two regulators is described in Equation 3 and Equation 4:

Equation 3.

Equation 4.

where

• I_L(in) is the total current that can be drawn from BP3 and BP6 in aggregate
• I_BP6 is the current limit of the BP6 regulator (120-mA minimum)
• I_VDD is the quiescent current of the TPS4022 (15-mA maximum)
• I_GATE is the gate drive current required by the power FETs
• f_SW is the switching frequency
• Q_gHIGH is the total gate charge required by the high-side FETs
• Q_gLOW is the total gate charge required by the low-side FETs