10.1 Layout Guidelines

Layout is a critical portion of good power supply design. Standard good practices should be applied. Some basic guidelines follow:

• The top layer contains the main power traces for PVIN, VIN, VOUT, and PHASE. Also on the top layer are connections for the remaining pins of the TPS50601A-SP and a large top side area filled with ground.
• The top layer ground area should be connected to the internal ground layer(s) using vias at the input bypass capacitor and the output filter capacitor.
• Thermal pad can be electrically floating or connected externally. If electrically connected externally then it must be connected to GND. Customer should evaluate their system performance when thermal pad is electrically isolated and thermally conductive.
• Preferred approach is that GND pin should be tied directly to the power pad under the IC and the PGND.
• The PVIN and VIN pins should be bypassed to ground with ceramic capacitors placed as close as possible to the pins.
• Since the PH connection is the switching node, the output inductor should be located close to the PH pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling.
• The RT, REFCAP and COMP pins are sensitive to noise so the respective components should be located as close as possible to the IC and routed with minimal lengths of trace.
• The feedback voltage signal VSENSE should be routed away from the switching node.