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ZHCSHF4J May 2004 – January 2018 TPS51116

PRODUCTION DATA.

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

RGE|24
PWP|20

散热焊盘机械数据 (封装 | 引脚)

PWP|20
- PPTD027Z
RGE|24
- QFND008AA

订购信息

6.7 Typical Characteristics

All data in the following graphs are measured from the PWP packaged device.

Figure 1. V5IN Supply Current vs Junction Temperature

DDR2	V_VTT = 0.3 V

Figure 3. V5IN Supply Current vs VTT Current

Figure 5. CS Current vs Junction Temperature

Figure 7. VTT Discharge Current vs Junction Temperature

DCAP Mode

I_VDDQ = 7 A

Figure 9. Switching Frequency vs Input Voltage

DDR	V_IN = 12 V
DCAP Mode

Figure 11. VDDQ Load Regulation

DDR

Figure 13. VTT Load Regulation

DDR3	V_VLDOIN = 1. 5 V

Figure 15. VTT Load Regulation

DDR

D021

Figure 17. VTTREF Load Regulation

DDR3

Figure 19. VTTREF Load Regulation

DDR	V_VDDQ = 2.5 V
f_SW = 400 kHz

Figure 21. VDDQ Efficiency vs VDDQ Current

Heavy Load

Figure 23. Ripple Waveforms

Figure 25. VTT Load Transient Response

Figure 27. Soft-Start Waveforms Tracking Discharge

Current mode

Figure 29. VDDQ Bode Plot

DDR2

Sink

Figure 31. VTT Bode Plot

Figure 2. V5IN Shutdown Current vs Junction Temperature

Figure 4. VLDOIN Supply Current vs Junction Temperature

Figure 6. VDDQ Discharge Current vs Junction Temperature

Figure 8. Overvoltage and Undervoltage Threshold vs Junction Temperature

DCAP Mode

V_IN =12 V

Figure 10. Switching Frequency vs I_VDDQ Output Current

DDR2	DCAP Mode

Figure 12. VDDQ Line Regulation

DDR2

Figure 14. VTT Load Regulation

DDR4

Figure 16. VTTREF Output Voltage vs Output Current

DDR2

Figure 18. VTTREF Load Regulation

DDR4

Figure 20. VTTREF Load Regulation

DDR2	V_VDDQ = 1.8 V
f_SW = 400 kHz

Figure 22. VDDQ Efficiency vs VDDQ Current

Figure 24. VDDQ Load Transient Response

Figure 26. VDDQ, VTT, and VTTREF Start-Up Waveforms

Figure 28. Soft-Stop Waveforms Non-Tracking Discharge

DDR2

Source

Figure 30. VTT Bode Plot