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ZHCSF57 June 2016 TPS51200-EP

PRODUCTION DATA.

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6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Input voltage⁽²⁾	REFIN, VIN, VLDOIN, VOSNS	–0.3	3.6	V
	EN	–0.3	6.5
	PGND to GND	–0.3	0.3
Output voltage⁽²⁾	REFOUT, VO	–0.3	3.6	V
Output voltage⁽²⁾	PGOOD	–0.3	6.5	V
Operating junction temperature, T_J		–55	150	°C
Storage temperature, T_stg		–55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to the network ground terminal unless otherwise noted.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)

		MIN	MAX	UNIT
Supply voltages	VIN	2.375	3.5	V
Voltage	EN, VLDOIN, VOSNS	–0.1	3.5	V
	REFIN	0.5	1.8
	PGOOD, VO	–0.1	3.5
	REFOUT	–0.1	1.8
	PGND	–0.1	0.1
Operating junction temperature, T_J		–55	125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS51200-EP	UNIT
		DRC (VSON)
		10 PINS
R_θJA	Junction-to-ambient thermal resistance	55.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	84.6	°C/W
R_θJB	Junction-to-board thermal resistance	30	°C/W
ψ_JT	Junction-to-top characterization parameter	5.5	°C/W
ψ_JB	Junction-to-board characterization parameter	30.1	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	10.9	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Over recommended junction temperature range, V_VIN = 3.3 V, V_VLDOIN = 1.8 V, V_REFIN = 0.9 V, V_VOSNS = 0.9 V, V_EN = V_VIN, C_OUT = 3 × 10 μF and circuit shown in (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY CURRENT
I_IN	Supply current	T_J = 25 °C, V_EN = 3.3 V, no load		0.7	1	mA
I_IN(SDN)	Shutdown current	T_J = 25 °C, V_EN = 0 V, V_REFIN = 0, no load		65	80	μA
I_IN(SDN)	Shutdown current	T_J = 25 °C, V_EN = 0 V, V_REFIN > 0.4 V, no load		200	400	μA
I_LDOIN	Supply current of VLDOIN	T_J = 25 °C, V_EN = 3.3 V, no load		1	50	μA
I_LDOIN(SDN)	Shutdown current of VLDOIN	T_J = 25 °C, V_EN = 0 V, no load		0.1	50	μA
INPUT CURRENT
I_REFIN	Input current, REFIN	V_EN = 3.3 V			1	μA
VO OUTPUT
V_VOSNS	Output DC voltage, VO	V_REFOUT = 1.25 V (DDR1), I_O = 0 A		1.25		V
		V_REFOUT = 1.25 V (DDR1), I_O = 0 A	–15		15	mV
		V_REFOUT = 0.9 V (DDR2), I_O = 0 A		0.9		V
		V_REFOUT = 0.9 V (DDR2), I_O = 0 A	–15		15	mV
		V_LDOIN = 1.5 V, V_REFOUT = 0.75 V (DDR3), I_O = 0 A		0.75		V
		V_LDOIN = 1.5 V, V_REFOUT = 0.75 V (DDR3), I_O = 0 A	–15		15	mV
V_VOTOL	Output voltage tolerance to REFOUT	–2 A < I_VO < 2 A	–25		25	mV
I_VOSRCL	VO source current Limit	With reference to REFOUT, V_OSNS = 90% × V_REFOUT	3		4.5	A
I_VOSNCL	VO sink current Limit	With reference to REFOUT, V_OSNS = 110% × V_REFOUT	3.5		5.5	A
I_DSCHRG	Discharge current, VO	V_REFIN = 0 V, V_VO = 0.3 V, V_EN = 0 V, T_J = 25°C		18	25	Ω
POWERGOOD COMPARATOR
V_TH(PG)	VO PGOOD threshold	PGOOD window lower threshold with respect to REFOUT	–23.5%	–20%	–17.5%
		PGOOD window upper threshold with respect to REFOUT	17.5%	20%	23.5%
		PGOOD hysteresis		5%
t_PGSTUPDLY	PGOOD start-up delay	Start-up rising edge, VOSNS within 15% of REFOUT		2		ms
V_PGOODLOW	Output low voltage	I_SINK = 4 mA			0.4	V
t_PBADDLY	PGOOD bad delay	VOSNS is outside of the ±20% PGOOD window		10		μs
I_PGOODLK	Leakage current⁽¹⁾	V_OSNS = V_REFIN (PGOOD high impedance), V_PGOOD = V_VIN + 0.2 V			1	μA
REFIN AND REFOUT
V_REFIN	REFIN voltage range		0.5		1.8	V
V_REFINUVLO	REFIN undervoltage lockout	REFIN rising	360	390	420	mV
V_REFINUVHYS	REFIN undervoltage lockout hysteresis			20		mV
V_REFOUT	REFOUT voltage			REFIN		V
V_REFOUTTOL	REFOUT voltage tolerance to V_REFIN	–10 mA < I_REFOUT < 10 mA, V_REFIN = 1.25 V	–15		15	mV
		–10 mA < I_REFOUT < 10 mA, V_VREFIN = 0.9 V	–15		15
		–10 mA < I_REFOUT < 10 mA, V_REFIN = 0.75 V	–15		15
		–10 mA < I_REFOUT < 10 mA, V_REFIN = 0.6 V	–15		15
I_REFOUTSRCL	REFOUT source current limit	V_REFOUT = 0 V	10	40		mA
I_REFOUTSNCL	REFOUT sink current limit	V_REFOUT = 0 V	10	40		mA
UVLO AND EN LOGIC THRESHOLD
V_VINUVVIN	UVLO threshold	Wake up, T_J = 25°C	2.2	2.3	2.375	V
V_VINUVVIN	UVLO threshold	Hysteresis		50		mV
V_ENIH	High-level input voltage	Enable	1.7			V
V_ENIL	Low-level input voltage	Enable			0.3	V
V_ENYST	Hysteresis voltage	Enable		0.5		V
I_ENLEAK	Logic input leakage current	EN, T_J = 25°C	–1		1	μA
THERMAL SHUTDOWN
T_SON	Thermal shutdown threshold⁽¹⁾	Shutdown temperature		150		°C
T_SON	Thermal shutdown threshold⁽¹⁾	Hysteresis		25		°C