The device reads the voltage on the MODE pin during start-up and latches onto one of the MODE options listed below in Table 7-1 . The voltage on the MODE pin can be set by connecting this pin to the center tap of a resistor divider connected between VCC and AGND. A guideline for the top resistor (R_{M_H}) and the bottom resistor (R_{M_L}) is shown in Table 7-1, and 1% resistors are recommended. It is important that the voltage for the MODE pin is derived from the VCC rail only since internally this voltage is referenced to detect the MODE option. The MODE pin setting can be reset only by a VIN power cycling or EN toggle.

Figure 7-1 below shows the typical start-up sequence of the device once the enable signal crosses the EN turn on threshold. After the voltage on VCC crosses the rising UVLO threshold it takes about 500us to read the first mode setting and approximately 100us from there to finish the last mode setting. The output voltage starts ramping after the mode reading is done.

Figure 7-1 Power-Up Sequence