ZHCS625B DECEMBER 2011 – February 2019 TPS53219A
PRODUCTION DATA.
- 1 特性
- 2 应用
- 3 说明
- 4 修订历史记录
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Enable and Soft-Start
- 7.3.2 Adaptive ON-Time D-CAP Control and Frequency Selection
- 7.3.3 Small Signal Model
- 7.3.4 Ramp Signal
- 7.3.5 Adaptive Zero Crossing
- 7.3.6 Output Discharge Control
- 7.3.7 Low-Side Driver
- 7.3.8 High-Side Driver
- 7.3.9 Power Good
- 7.3.10 Current Sense and Overcurrent Protection
- 7.3.11 Overvoltage and Undervoltage Protection
- 7.3.12 UVLO Protection
- 7.3.13 Thermal Shutdown
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文档支持
- 12机械、封装和可订购信息
7.3.7 Low-Side Driver
The low-side driver is designed to drive high-current low-RDS(on) N-channel MOSFETs. The drive capability is represented by its internal resistance, which is 1.0 Ω for VDRV to DRVL and 0.5 Ω for DRVL to GND. A dead time to prevent shoot through is internally generated between high-side MOSFET off to low-side MOSFET on, and low-side MOSFET off to high-side MOSFET on. The bias voltage VDRV can be delivered from 6.2-V VREG supply or from external power source from 4.5 V to 6.5 V. The instantaneous drive current is supplied by an input capacitor connected between the VDRV and PGND pins.
The average low-side gate drive current is calculated in Equation 3.
When VDRV is supplied by external voltage source, the device continues to be supplied by the VREG pin. There is no internal connection from VDRV to VREG.