ZHCSTR3B December 2010 – November 2023 TPS53315
PRODUCTION DATA
From small-signal loop analysis, a buck converter using D-CAP integrated circuit can be simplified as shown in Figure 6-3.
The output voltage is compared with the internal reference voltage (ramp signal is ignored here for simplicity). The PWM comparator determines the timing to turn on the high-side MOSFET. The gain and speed of the comparator can be assumed high enough to keep the voltage at the beginning of each on-cycle substantially constant.
For the loop stability, the 0 dB frequency, ƒ0, defined in Equation 2 must be lower than ¼ of the switching frequency.
According to Equation 2, the loop stability of D-CAP integrated circuit modulator is mainly determined by the capacitor chemistry. For example, specialty polymer capacitors (SP-CAP) have COUT on the order of several 100 µF and ESR in range of 10 mΩ. These makes ƒ0 on the order of 100 kHz or less and the loop is stable. However, ceramic capacitors have an ƒ0 at more than 700 kHz, and need special care when used with this modulator. An application circuit using ceramic capacitors is described in Section 7.2.2.3 section.