ZHCSGE0B June 2017 – January 2019 TPS53681
PRODUCTION DATA.
The STATUS_INPUT command returns one byte of information relating to the status of the converter's input voltage and current related faults.
The STATUS_INPUT command must be accessed through Read Byte/Write Byte transactions. The STATUS_INPUT command is shared between Channel A and Channel B. All transactions to this command will affect both channels regardless of the PAGE command.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RW | 0 | 0 | RW | RW | RW | RW | RW |
VIN_OVF | VIN_OVW | VIN_UVW | VIN_UVF | LOW_VIN | IIN_OCF | IIN_OCW | PIN_OPW |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | VIN_OVF | R | Current
Status |
Input Over-Voltage Fault
0: Latched flag indicating no VIN OV fault has occurred. 1: Latched flag indicating a VIN OV fault has occurred. |
6 | VIN_OVW | R | 0 | Not supported and always set to 0. |
5 | VIN_UVW | R | 0 | Not supported and always set to 0. |
4 | VIN_UVF | R | Current
Status |
Input Under-Voltage Fault
0: Latched flag indicating no VIN UV fault has occurred. 1: Latched flag indicating a VIN UV fault has occurred. |
3 | LOW_VIN | R | Current
Status |
Unit Off for insufficient input voltage
0: Latched flag indicating no LOW_VIN fault has occurred. 1: Latched flag indicating a LOW_VIN fault has occurred |
2 | IIN_OCF | R | Current
Status |
Input Over-Current Fault
0: Latched flag indicating no IIN OC fault has occurred. 1: Latched flag indicating a IIN OC fault has occurred. |
1 | IIN_OCW | R | Current
Status |
Input Over-Current Warning
0: Latched flag indicating no IIN OC warning has occurred. 1: Latched flag indicating a IIN OC warning has occurred. |
0 | PIN_OPW | R | Current
Status |
Input Over-Power Warning
0: Latched flag indicating no input over-power warning has occurred. 1: Latched flag indicating a input over-power warning has occurred. |
Per the description in the PMBus 1.3 specification, part II, TPS53681 does support clearing of status bits by writing to STATUS registers. Writing a 1 to any supported bit in this register will attempt to clear it as a fault condition.