ZHCSGE0B June 2017 – January 2019 TPS53681
PRODUCTION DATA.
The IOUT_CAL_GAIN command is used to set the ratio of the voltage at the current sense pins to the sensed current, in mΩ.
IOUT_CAL_GAIN is a linear format command. The IOUT_CAL_GAIN command must be accessed through Read Word/Write Word transactions.
IOUT_CAL_GAIN is a paged register. In order to access IOUT_CAL_GAIN for channel A, PAGE must be set to 00h. In order to access the IOUT_CAL_GAIN register for channel B, PAGE must be set to 01h. For simultaneous access of channels A and B, the PAGE command must be set to FFh. IOUT_CAL_GAIN is also a phased register. Depending on the configuration of the design, for channel A, PHASE must be set to 00h to access Phase 1, 01h to access Phase 2, etc... PHASE must be set to FFh to access all phases simultaneously. PHASE may also be set to 80h to apply IOUT_CAL_GAIN to the total phase current (sum of all active phases for the current channel) measurement, as described in Output Current Sense and Calibration.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
R | R | R | R | R | RW | RW | RW |
IOCG_EXP | IOCG_MAN | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RW | RW | RW | RW | RW | RW | RW | RW |
IOCG_MAN |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:11 | IOCG_EXP | R | 11010b |
Linear two's complement exponent, –6. LSB = 0.015625 mΩ |
10:0 | IOCG_MAN | RW | NVM |
Linear two's complement mantissa. See the table of acceptable values below. |
IOUT_CAL_GAIN (hex) | Current Sense Gain (mΩ) |
---|---|
D131h | 4.765625 |
D132h | 4.78125 |
D133h | 4.796875 |
D134h | 4.8125 |
D135h | 4.828125 |
D136h | 4.84375 |
D137h | 4.859375 |
D138h | 4.875 |
D139h | 4.890625 |
D13Ah | 4.90625 |
D13Bh | 4.921875 |
D13Ch | 4.9375 |
D13Dh | 4.953125 |
D13Eh | 4.96875 |
D13Fh | 4.984375 |
D140h | 5 |
D141h | 5.015625 |
D142h | 5.03125 |
D143h | 5.046875 |
D144h | 5.0625 |
D145h | 5.078125 |
D146h | 5.09375 |
D147h | 5.109375 |
D148h | 5.125 |
D149h | 5.140625 |
D14Ah | 5.15625 |
D14Bh | 5.171875 |
D14Ch | 5.1875 |
D14Dh | 5.203125 |
D14Eh | 5.21875 |
D14Fh | 5.234375 |
D150h | 5.25 |
Attempts to write any value other than those specified above results in invalid transactions. The device ignores the invalid data, sets the appropriate flags in STATUS_CML and STATUS_WORD, and asserts the PMB_ALERT signal to notify the system host of an invalid transaction.