ZHCS937E May 2012 – November 2015 TPS54061
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NUMBER | ||
BOOT | 1 | O | A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the minimum required by the output device, the output is forced to switch off until the capacitor is refreshed. |
VIN | 2 | I | Input supply voltage, 4.7 V to 60 V. |
EN | 3 | I | Enable pin with internal pull-up current source. Pull below 1.18 V to disable. Float to enable. Adjust the input undervoltage lockout (UVLO) with two resistors, see the Enable and Adjusting Undervoltage Lockout section. |
RT/CLK | 4 | I | Resistor Timing and External Clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the mode returns to a resistor frequency programming. |
VSENSE | 5 | I | Inverting input of the transconductance (gm) error amplifier. |
COMP | 6 | O | Error amplifier output and input to the output switch current comparator. Connect frequency compensation components to this pin. |
GND | 7 | – | Ground |
PH | 8 | O | The source of the internal high-side power MOSFET and drain of the internal low-side MOSFET |
Thermal Pad | 9 | – | GND pin must be electrically connected to the exposed pad on the printed circuit board for proper operation. |