ZHCSF14D March   2010  – October 2018 TPS54260

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
      2.      效率与负载电流间的关系
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Pulse-Skip Eco-Mode
      4. 7.3.4  Low-Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Voltage Reference
      7. 7.3.7  Adjusting the Output Voltage
      8. 7.3.8  Enable and Adjusting Undervoltage Lockout
      9. 7.3.9  Slow-Start / Tracking Pin (SS/TR)
      10. 7.3.10 Overload Recovery Circuit
      11. 7.3.11 Sequencing
      12. 7.3.12 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      13. 7.3.13 Overcurrent Protection and Frequency Shift
      14. 7.3.14 Selecting the Switching Frequency
      15. 7.3.15 How to Interface to RT/CLK Pin
      16. 7.3.16 Powergood (PWRGD Pin)
      17. 7.3.17 Overvoltage Transient Protection
      18. 7.3.18 Thermal Shutdown
      19. 7.3.19 Small Signal Model for Loop Response
      20. 7.3.20 Simple Small Signal Model for Peak Current Mode Control
      21. 7.3.21 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Near Minimum Input Voltage
      2. 7.4.2 Operation With Enable Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 3.3-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency
          3. 8.2.1.2.3  Output Inductor Selection (LO)
          4. 8.2.1.2.4  Output Capacitor
          5. 8.2.1.2.5  Catch Diode
          6. 8.2.1.2.6  Input Capacitor
          7. 8.2.1.2.7  Slow-Start Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor Selection
          9. 8.2.1.2.9  Undervoltage Lock Out Set Point
          10. 8.2.1.2.10 Output Voltage and Feedback Resistors Selection
          11. 8.2.1.2.11 Compensation
          12. 8.2.1.2.12 Discontinuous Mode and Eco-Mode Boundary
          13. 8.2.1.2.13 Power Dissipation Estimate
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Inverting Power Supply
      3. 8.2.3 Split-Rail Power Supply
      4. 8.2.4 12-V to 3.8-V GSM Power Supply
      5. 8.2.5 24-V to 4.2-V GSM Power Supply
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
      2. 11.1.2 开发支持
        1. 11.1.2.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Slow-Start / Tracking Pin (SS/TR)

The TPS54260 effectively uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as the power-supply's reference voltage and regulates the output accordingly. A capacitor on the SS/TR pin-to-ground implements a slow-start time. The TPS54260 has an internal pullup current source of 2 μA that charges the external slow-start capacitor. The calculations for the slow-start time (10% to 90%) are shown in Equation 6. The voltage reference (VREF) is 0.8 V and the slow-start current (ISS) is 2 μA. The slow-start capacitor should remain lower than 0.47 μF and greater than 0.47 nF.

Equation 6. TPS54260 eq6_lvs795.gif

At power-up, the TPS54260 will not start switching until the slow-start pin is discharged to less than 40 mV to ensure a proper power-up, see Figure 30.

Also, during normal operation, the TPS54260 will stop switching and the SS/TR must be discharged to 40 mV, when the VIN UVLO is exceeded, EN pin pulled below 1.25 V, or a thermal shutdown event occurs.

The VSENSE voltage will follow the SS/TR pin voltage with a 45-mV offset up to 85% of the internal voltage reference. When the SS/TR voltage is greater than 85% on the internal reference voltage the offset increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference (see Figure 23). The SS/TR voltage will ramp linearly until clamped at 1.7 V.

TPS54260 starting_lvs795.gifFigure 30. Operation of SS/TR Pin when Starting