7.3.11 Sequencing

Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD pins. The sequential method can be implemented using an open-drain output of a power-on reset pin of another device. The sequential method is illustrated in Figure 31 using two TPS54260 devices. The powergood is coupled to the EN pin on the TPS54260 which will enable the second power supply once the primary supply reaches regulation. If needed, a 1-nF ceramic capacitor on the EN pin of the second power supply will provide a 1-ms start-up delay. Figure 32 shows the results of Figure 31.

Figure 31. Schematic for Sequential Start-Up Sequence	Figure 32. Sequential Start-Up using EN and PWRGD

Figure 33. Schematic for Ratiometric Start-Up Sequence	Figure 34. Ratiometric Start-Up using Coupled SS/TR Pins

Figure 33 shows a method for ratio-metric start-up sequence by connecting the SS/TR pins together. The regulator outputs will ramp up and reach regulation at the same time. When calculating the slow-start time, the pullup current source must be doubled in Equation 6. Figure 34 shows the results of Figure 33.

Figure 35. Schematic for Ratio-Metric and Simultaneous Start-Up Sequence

Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network of R1 and R2 shown in Figure 35 to the output of the power supply that needs to be tracked or another voltage reference source. Using Equation 7 and Equation 8, the tracking resistors can be calculated to initiate the Vout2 slightly before, after or at the same time as Vout1. Equation 9 is the voltage difference between Vout1 and Vout2 at the 95% of nominal output regulation.

The deltaV variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS/TR to VSENSE offset (Vssoffset) in the slow-start circuit and the offset created by the pullup current source (Iss) and tracking resistors, the Vssoffset and Iss are included as variables in the equations.

To design a ratio-metric start-up in which the Vout2 voltage is slightly greater than the Vout1 voltage when Vout2 reaches regulation, use a negative number in Equation 7 through Equation 9 for deltaV. Equation 9 will result in a positive number for applications which the Vout2 is slightly lower than Vout1 when Vout2 regulation is achieved.

Since the SS/TR pin must be pulled below 40 mV before starting after an EN, UVLO or thermal shutdown fault, careful selection of the tracking resistors is needed to ensure the device will restart after a fault. Make sure the calculated R1 value from Equation 7 is greater than the value calculated in Equation 10 to ensure the device can recover from a fault.

As the SS/TR voltage becomes more than 85% of the nominal reference voltage the Vssoffset becomes larger as the slow-start circuits gradually handoff the regulation reference to the internal voltage reference. The SS/TR pin voltage needs to be greater than 1.3 V for a complete handoff to the internal voltage reference as shown in Figure 23.

Equation 7.

Equation 8.

Equation 9.

Equation 10.

Figure 36. Ratiometric Start-Up With Tracking Resistors

Figure 38. Simultaneous Start-Up With Tracking Resistor

Figure 37. Ratiometric Start-Up With Tracking Resistors