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ZHCS338D October 2011 – August 2016 TPS54295

PRODUCTION DATA.

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机械数据 (封装 | 引脚)

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- MPDS371A
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- MPQF145D

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- PPTD023AC
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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS54295 is a typical step-down DC-DC converter. The device typically is used to convert a higher DC voltage to a lower DC voltage with a maximum output current of 2 A.

8.2 Typical Application

Figure 16. Schematic Diagram for the Design Example

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 1 as the input parameters.

Table 1. Design Parameters

PARAMETER	EXAMPLE VALUE
Input voltage	4.5 V to 18 V
Output voltage	1.05 V and 1.8 V
Transient response (1.5-A load step)	ΔV_OUT = ±5%
Input ripple voltage	400 mV
Output ripple voltage	30 mV
Output current rating	2 A
Operating frequency	700 kHz

8.2.2 Detailed Design Procedure

This section presents a simplified design process and guidelines for component selection. Alternatively the WEBENCH® software may be used to generate a complete design. WEBENCH uses an iterative design procedure and accesses a comprehensive database of components when generating a design.

To begin the design process, determine the following application parameters:

Input voltage
Output voltage
Output current

In all formulas x is used to indicate that they are valid for both converters. For the calculations the estimated switching frequency of 700 kHz is used.

8.2.2.1 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the VFBx pin. TI recommends 1% tolerance or better divider resistors. Start by using Equation 3 to calculate V_OUTx.

To improve the efficiency at very light loads consider using larger value resistors, but resistance values that are too high make the device susceptible to noise and voltage errors due to the VFBx input current being more noticeable.

Equation 3. TPS54295 EQ3_vout_lvsb01.gif

8.2.2.2 Output Filter Selection

The output filter used with the TPS54295 is an LC circuit. This LC filter has a double pole at:

Equation 4. TPS54295 EQ4_Fp_lvsb01.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS545295. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2 introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 4 is located below the high frequency zero but close enough that the phase boost provided by the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values recommended in Table 2.

Table 2. Recommended Component Values

OUTPUT VOLTAGE (V)	R1x (kΩ)	R2x (kΩ)	C_FFx (pF)⁽¹⁾	L1x (µH)	C2x (µF)
1	6.81	22.1	—	1 to 1.5	22 to 68
1.05	8.25	22.1	—	1 to 1.5	22 to 68
1.2	12.7	22.1	—	1 to 1.5	22 to 68
1.5	21.5	22.1	—	1.5	22 to 68
1.8	30.1	22.1	5 to 22	1.5	22 to 68
2.5	49.9	22.1	5 to 22	2.2	22 to 68
3.3	73.2	22.1	5 to 22	2.2	22 to 68
5	124	22.1	5 to 22	3.3	22 to 68

(1) Optional

For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor (C_FF) in parallel with R1.

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 5, Equation 6, and Equation 7. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current.

For the calculations, use 700 kHz as the switching frequency (f_SW). Make sure the chosen inductor is rated for the peak current of Equation 6 and the RMS current of Equation 7.

Equation 5. TPS54295 EQ5_Dilx_lvsb01.gif

Equation 6. TPS54295 EQ6_Ipeak_lvsb01.gif

Equation 7. TPS54295 EQ7_Ilox_lvsb01.gif

For this design example, the calculated peak current is 2.46 A and the calculated RMS current is 2.02 A for V_OUT1. The inductor used has a rated current of 7.3 A based on the inductance change and of 4.9 A based on the temperature rise.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS54295 is intended for use with ceramic or other low ESR capacitors. TI recommends a value from 22 µF to 68 µF. Use Equation 8 to determine the required RMS current rating for the output capacitors.

Equation 8. TPS54295 EQ8_Icox_lvsb01.gif

For this design two 22-µF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.19 A and each output capacitor is rated for 4 A.

8.2.2.3 Input Capacitor Selection

The TPS54295 requires an input decoupling capacitor and a bulk capacitor may be required depending on the application. TI recommends a ceramic capacitor of at least 10 µF for the decoupling capacitor. Additionally, TI recommends 0.1-µF ceramic capacitors from VIN1 and VIN2 to ground to improve the stability and reduce the SWx node overshoots. The capacitors' voltage rating must be greater than the maximum input voltage.

8.2.2.4 Bootstrap Capacitor Selection

A 0.1-µF ceramic capacitor must be connected between the VBSTx and SWx pins for proper operation. TI recommends ceramic capacitors with a dielectric of X5R or better.

8.2.2.5 VREG5 Capacitor Selection

A 1-µF ceramic capacitor must be connected between the VREG5 and GND pins for proper operation. TI recommends a ceramic capacitor with a dielectric of X5R or better.