ZHCSI26C August 2010 – April 2018 TPS54320
PRODUCTION DATA.
PIN | DESCRIPTION | |
---|---|---|
NAME | NO. | |
RT/CLK | 1 | Automatically selects between RT mode and CLK mode. An external timing resistor adjusts the switching frequency of the device; In CLK mode, the device synchronizes to an external clock. |
GND | 2 | Return for control circuitry and low-side power MOSFET. |
3 | ||
PVIN | 4 | Power input. Supplies the power switches of the power converter. |
5 | ||
VIN | 6 | Supplies the control circuitry of the power converter. |
VSENSE | 7 | Inverting input of the gm error amplifier. |
COMP | 8 | Error amplifier output, and input to the output switch current comparator. Connect frequency compensation to this pin. |
SS/TR | 9 | Slow-start and tracking. An external capacitor connected to this pin sets the internal voltage reference rise time. The voltage on this pin overrides the internal reference. It can be used for tracking and sequencing. |
EN | 10 | Enable pin. Float to enable. Adjust the input undervoltage lockout with two resistors. |
PH | 11 | The switch node |
12 | ||
BOOT | 13 | A bootstrap cap is required between BOOT and PH. The voltage on this cap carries the gate drive voltage for the high-side MOSFET. |
PWRGD | 14 | Open-drain Power Good fault pin. Asserts low due to thermal shutdown, undervoltage, overvoltage, EN shutdown, or during slow start. |
Exposed thermal PAD | 15 | Thermal pad of the package and signal ground. It must be soldered down for proper operation. |