Layout is a critical portion of good power supply design. See Figure 10-1 for a PCB layout example. Key guidelines to follow for the layout are:
- VIN, PGND, and SW traces must be as wide as
possible to reduce trace impedance and improve heat dissipation.
- Place a 10-nF to 100-nF capacitor from each VIN to PGND pin and place them as
close as possible to the device on the same side of the PCB. Place the remaining ceramic
input capacitance next to these high frequency bypass capacitors. The remaining input
capacitance can be placed on the other side of the board but use as many vias as
possible to minimize impedance between the capacitors and the pins of the IC.
- Use multiple vias near the PGND pins and use the layer directly below the device to connect them together. This helps to minimize noise and can help heat dissipation.
- Use vias near both VIN pins and provide a low impedance connection between them through an internal layer.
- Place the inductor as close as possible to the device to minimize the length of the SW node routing.
- Place the BOOT-SW capacitor as close as possible to the BOOT and SW pins.
- Place the BP5 capacitor as close as possible to the BP5 and AGND pins.
- Place the bottom resistor in the FB divider as close as possible to the FB and
AGND pins of the IC. Also keep the upper feedback resistor and the feedforward capacitor
near the IC. Connect the FB divider to the output voltage at the desired point of
regulation.
- Use multiple vias in the AGND island to connect it back to internal PGND
layers. Do not place these vias between the BP5 capacitor and the AGND pin. These vias
will conduct switching currents between the BP5 capacitor and PGND. Placing the vias
near the AGND pin can add noise to the FB divider.
- Return the FSEL and MODE resistors to a quiet AGND island.