When the external clock is present, the device synchronizes the switching frequency to the clock. Any time the external clock is not present, the device will default to the internal PWM oscillator frequency.

If the device starts up before an external clock signal is applied, then the internal PWM oscillator frequency is set by the R_FSEL resistor according to Table 7-1. The device switches at this frequency until the external clock is applied or anytime the external clock is not present.

If the external clock is applied before the device starts up, then the R_FSEL resistor is not needed. The device will determine the internal clock frequency by decoding the external clock frequency. Table 7-2 shows the decoding of the internal PWM oscillator frequency based on the external clock frequency.

The thresholds for the external SYNC clock frequency ranges have approximately a ±5% tolerance. If the external clock frequency is to be within that tolerance range, it is possible for the internal PWM oscillator frequency to be decoded as either the frequency above or below that threshold. Since the internal frequency is what is used in case of the loss of the synchronization clock, it is recommended that the output LC filter and ramp selection are chosen to be stable for either frequency. Table 7-3 shows the tolerance range of the decode thresholds. If the external clock is to be within any of these ranges, it is recommended to ensure converter stability for both possible internal PWM oscillator frequencies.