7.3.14 Synchronize Using the RT/CLK Pin

The RT/CLK pin is used to synchronize the converter to an external system clock. See Figure 29. To implement the synchronization feature in a system, connect a square wave to the RT/CLK pin with an on time of at least 75ns. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the mode returns to the frequency set by the resistor. The square wave amplitude at this pin must transition lower than 0.6 V and higher than 1.6 V typically. The recommended synchronization frequency range is 300 kHz to 2000 kHz. If the external system clock is to be removed, TI recommends that it be removed on the falling edge of the clock.

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Figure 29. Synchronizing to a System Clock

Figure 30. Plot of Synchronizing to System Clock