ZHCSR16 September 2022 TPS544C26
ADVANCE INFORMATION
| CMD Address | B0h |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| NVM Backup: | EEPROM |
| Updates: | On-the-fly |
The DVID_OFFSET command contains 2 fields for configuring the DAC offset during a DVID transition. This Vout-referred offset is added only during a DVID transition (for example per SetVID or SetWP command). DVID_OFS_UP is used to compensate for delays in the feedback compensation network and reach the target value faster for DVID up scenario, and DVID_OFS_DOWN is implemented to prevent the output from ringing below the target for DVID down scenario. Note that:
Return to Supported I2C and Default Values.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R | R | R | R | R/W | R/W | R/W | R/W |
| Reserved | DVID_OFS_DOWN | DVID_OFS_UP | |||||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7:4 | Reserved | R | 0000b | Not used and always set to 0. |
| 3:2 | DVID_OFS_DOWN | R/W | NVM | This positive offset is
effectively a threshold: When the new VID target is lower than the
current VOUT, the DAC starts counting down from its current value
using the selected slew rate, and continues until the DAC reaches
VID target + DVID_OFS_DOWN. At that point, the VOUT transition slew
rate changes to ¼ of the selected slew rate until the actual VID
target is reached. 00b: DVID_OFS_DOWN = 0 mV 01b: DVID_OFS_DOWN = 5 mV 10b: DVID_OFS_DOWN = 10 mV 11b: DVID_OFS_DOWN = 20 mV |
| 1:0 | DVID_OFS_UP | R/W | NVM | This positive DAC offset is
to be added when the new VID target is higher than the current VOUT.
DVID_OFS_UP is added immediately to the current DAC count as the
first step toward the new target, and as soon as the DAC count
reaches the VID target, the DAC stops the ramp, and DVID_OFS_UP is
no longer applied. 00b: DVID_OFS_UP = 0 mV 01b: DVID_OFS_UP = 5 mV 10b: DVID_OFS_UP = 10 mV 11b: DVID_OFS_UP = 20 mV |