ZHCSR16 September 2022 TPS544C26
ADVANCE INFORMATION
CMD Address | 43h |
Write Transaction: | Write Byte |
Read Transaction: | Read Byte |
Format: | Unsigned Binary (1 byte) |
NVM Backup: | EEPROM |
Updates: | On-the-fly |
The VOUT_UV_WARN_LIMIT command sets the value of the output voltage sensed at the (VOSNS − GOSNS) pins that causes an output voltage low warning. This value is typically less negative than the output undervoltage fault threshold. The SEL_UVW bits set an undervoltage warning threshold relative to the current VOUT setting that is commanded by either SVID SetVID command or I2C (A6h) VOUT_CMD.
When the sensed output voltage falls below the VOUT Tracking UVW threshold, the UVW bit in the (7Ah) STATUS_VOUT register is set. Due to the lack of an I2C alert pin, the TPS544C26 device does not have a way to notify the host.
Return to Supported I2C and Default Values.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
R | R | R | R | R | R | R/W | R/W |
Reserved | SEL_UVW |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Access | Reset | Description |
---|---|---|---|---|
7:2 | Reserved | R | 000000b | Not used and always set to 0. |
1:0 | SEL_UVW | R/W | NVM | Sets the
undervoltage warning threshold. 00b: VOUT Tracking UVW threshold = −100 mV 01b: VOUT Tracking UVW threshold = −150 mV 10b: VOUT Tracking UVW threshold = −200 mV 11b: VOUT Tracking UVW threshold = −300 mV |