ZHCSR16 September 2022 TPS544C26
ADVANCE INFORMATION
| CMD Address | 15h |
| Write Transaction: | Send Byte |
| Read Transaction: | N/A |
| Format: | Data-less |
| NVM Back-up: | No |
| Updates: | Not recommended for on-the-fly-use, but not explicitly blocked |
The STORE_USER_ALL command instructs the TPS544C26 device to copy the entire contents of the Operating Memory to the matching locations in the non-volatile User Store Memory. Any items in Operating Memory that do not have matching locations in the User Store Memory are ignored. Writing a "1" into bit[0] of this command executes the store operation. The bit clears itself after the write.
User must wait for at least 150 msec from executing this command before power can be turned off to make sure a successful write to NVM is executed. NVM store operation is not recommended while the output is enabled, although the user is not explicitly prevented from doing so, as interruption can result in a corrupted NVM. I2C commands issued during this time will be ignored. Following issuance of NVM store operations, TI recommends disabling regulation and waiting a minimum of 125 ms before continuing.
Return to Supported I2C and Default Values.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| W | W | W | W | W | W | W | W |
| Reserved | STORE | ||||||
| LEGEND: R/W = Read/Write; R = Read only |