ZHCS924D May   2012  – April 2021 TPS54526

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  PWM Operation
      2. 7.3.2  PWM Frequency and Adaptive On-Time Control
      3. 7.3.3  Soft Start and Pre-Biased Soft Start
      4. 7.3.4  Power Good
      5. 7.3.5  VREG5
      6. 7.3.6  Output Discharge Control
      7. 7.3.7  Current Protection
      8. 7.3.8  Over/Under Voltage Protection
      9. 7.3.9  UVLO Protection
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip Eco-Mode™ Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step By Step Design Procedure
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Filter Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Bootstrap Capacitor Selection
        6. 8.2.2.6 VREG5 Capacitor Selection
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 静电放电警告
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Thermal Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Output Filter Selection

The output filter used with the TPS54526 is an LC circuit. This LC filter has double pole at:

Equation 4. GUID-FCEA4B8C-7999-482B-8D87-C989C2DDCBD8-low.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54526. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a -40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 4 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values recommended in Table 8-2

Table 8-2 Recommended Component Values
Output Voltage (V)R1 (kΩ)R2 (kΩ)C4 (pF)(1)L1 (µH)C8 + C9 (µF)
16.8122.11.0 - 1.522 - 68
1.058.2522.11.0 - 1.522 - 68
1.212.722.11.0 - 1.522 - 68
1.521.522.11.522 - 68
1.830.122.15 - 221.522 - 68
2.549.922.15 - 222.222 - 68
3.373.222.15 - 222.222 - 68
512422.15 - 223.322 - 68
Optional

For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor (C4) in parallel with R1.

Since the DC gain is dependent on the output voltage, the required inductor value increases as the output voltage increases. For higher output voltages above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor (C4) in parallel with R1

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 5, Equation 6 and Equation 7. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 650 kHz for fSW.

Equation 5. GUID-0453CD0B-D4C8-4EC8-9253-145217DC0089-low.gif
Equation 6. GUID-B0B393E0-A6F0-4A36-B293-C49E0C70C060-low.gif
Equation 7. GUID-89C661C6-D80C-40CC-8A4D-71426BDF2545-low.gif

For this design example, the calculated peak current is 6.01 A and the calculated RMS current is 5.5 A. The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating
of 11 A.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS54526 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22uF to 68uF. Use Equation 8 to determine the required RMS current rating for the output capacitor

Equation 8. GUID-E839C31F-6437-4375-93CA-48498EBE7757-low.gif

For this design two TDK C3216X5R0J226M 22uF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is .284 A and each output capacitor is rated for 4 A.