ZHCS924D May 2012 – April 2021 TPS54526
PRODUCTION DATA
PIN | DESCRIPTION | ||
---|---|---|---|
NAME | NUMBER(1) | ||
PWP 14 | RSA 16 | ||
VO | 1 | 16 | Connect to output of converter. This pin is used for output discharge function. |
VFB | 2 | 1 | Converter feedback input. Connect to output voltage with feedback resistor divider. |
VREG5 | 3 | 2 | 5.5 V power supply output. A capacitor (typical 1 µF) should be connected to GND. VREG5 is not active when EN is low. |
SS | 4 | 3 | Soft-start control. An external capacitor should be connected to GND. |
GND | 5 | 4 | Signal ground pin. |
PG | 6 | 5 | Open drain power good output. |
EN | 7 | 6 | Enable control input. EN is active high and must be pulled up to enable the device. |
PGND1, PGND2 | 8, 9 | 7, 8 | Ground returns for low-side MOSFET. Also serve as inputs of current comparators. Connect PGND and GND strongly together near the IC. |
SW1, SW2, SW3(1) | 10, 11 | 9, 10, 11 | Switch node connection between high-side NFET and low-side NFET. Also serve as inputs to current comparators. |
VBST | 12 | 12 | Supply input for high-side NFET gate driver (boost terminal). Connect capacitor from this pin to respective SW1, SW2 terminals. An internal PN diode is connected between VREG5 to VBST pin. |
VIN1, VIN2, VIN3(1) | 13, 14 | 13, 14, 15 | Power input and connected to high side NFET drain. Supply input for 5-V internal linear regulator for the control circuitry. |
PowerPAD™ | Back side | Back side | Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Should be connected to PGND. |