米6体育平台手机版

ZHCSJK9H June 2001 – October 2015 TPS54610

PRODUCTION DATA.

封装选项

机械数据 (封装 | 引脚)

PWP|28
- MPDS373B

散热焊盘机械数据 (封装 | 引脚)

PWP|28
- PPTD031AA

订购信息

7.5 Electrical Characteristics

over operating free-air temperature range unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE, VIN
	Input voltage range, VIN		3		6	V
I_(Q)	Quiescent current	f_s = 350 kHz, SYNC ≤ 0.8 V, RT open, PH pin open	11		15.8	mA
		f_s = 550 kHz, SYNC ≥ 2.5 V, RT open, PH pin open	16		23.5
		Shutdown, SS/ENA = 0 V		1	1.4
UNDERVOLTAGE LOCK OUT
	Start threshold voltage, UVLO			2.95	3.0	V
	Stop threshold voltage, UVLO		2.70	2.80		V
	Hysteresis voltage, UVLO		0.14	0.16		V
	Rising and falling edge deglitch, UVLO⁽¹⁾			2.5		μs
BIAS VOLTAGE
	Output voltage, VBIAS	I_(VBIAS) = 0	2.70	2.80	2.90	V
	Output current, VBIAS ⁽²⁾				100	μA
CUMULATIVE REFERENCE
V_ref	Accuracy		0.882	0.891	0.900	V
REGULATION
	Line regulation⁽²⁾⁽³⁾	I_L = 3 A, f_s = 350 kHz, T_J = 85°C			0.04	%/V
	Line regulation⁽²⁾⁽³⁾	I_L = 3 A, f_s = 550 kHz, T_J = 85°C			0.04	%/V
	Load regulation⁽¹⁾⁽³⁾	I_L = 0 A to 6 A, f_s = 350 kHz, T_J = 85°C			0.03	%/A
	Load regulation⁽¹⁾⁽³⁾	I_L = 0 A to 6 A, f_s = 550 kHz, T_J = 85°C			0.03	%/A
OSCILLATOR
	Internally set—free running frequency	SYNC ≤ 0.8 V, RT open	280	350	420	kHz
	Internally set—free running frequency	SYNC ≥ 2.5 V, RT open	440	550	660	kHz
	Externally set—free running frequency range	RT = 180 kΩ (1% resistor to AGND)⁽¹⁾	252	280	308	kHz
		RT = 100 kΩ (1% resistor to AGND)	460	500	540
		RT = 68 kΩ (1% resistor to AGND)⁽¹⁾	663	700	762
	High level threshold, SYNC		2.5			V
	Low level threshold, SYNC				0.8	V
	Pulse duration, external synchronization, SYNC⁽¹⁾		50			ns
	Frequency range, SYNC⁽¹⁾		330		700	kHz
	Ramp valley^⁽¹⁾			0.75		V
	Ramp amplitude (peak-to-peak)⁽¹⁾			1		V
	Minimum controllable on time⁽¹⁾				200	ns
	Maximum duty cycle		90%
ERROR AMPLIFIER
	Error amplifier open loop voltage gain	1 kΩ COMP to AGND⁽¹⁾	90	110		dB
	Error amplifier unity gain bandwidth	Parallel 10 kΩ, 160 pF COMP to AGND⁽¹⁾	3	5		MHz
	Error amplifier common mode input voltage range	Powered by internal LDO⁽¹⁾	0		VBIAS	V
	Input bias current, VSENSE	VSENSE = V_ref		60	250	nA
	Output voltage slew rate (symmetric), COMP		1	1.4		V/μs
PWM COMPARATOR
	PWM comparator propagation delay time,PWM comparator input to PH pin (excluding deadtime)	10-mV overdrive⁽¹⁾		70	85	ns
SLOW-START/ENABLE
	Enable threshold voltage, SS/ENA		0.82	1.20	1.40	V
	Enable hysteresis voltage, SS/ENA			0.03		V
	Falling edge deglitch, SS/ENA⁽¹⁾			2.5		μs
	Internal slow-start time		2.6	3.35	4.1	ms
	Charge current, SS/ENA	SS/ENA = 0 V	3	5	8	μA
	Discharge current, SS/ENA	SS/ENA = 1.2 V, V_I = 2.7 V	2	2.3	4	mA
POWER GOOD
	Power good threshold voltage	VSENSE falling		90		%V_ref
	Power good hysteresis voltage⁽¹⁾			3		%V_ref
	Power good falling edge deglitch⁽¹⁾			35		μs
	Output saturation voltage, PWRGD	I_(sink) = 2.5 mA		0.18	0.3	V
	Leakage current, PWRGD	V_I= 5.5 V			1	μA
CURRENT LIMIT
	Current limit trip point	V_I= 3 V Output shorted⁽¹⁾	7.2	10		A
	Current limit trip point	V_I= 6 V Output shorted⁽¹⁾	10	12		A
	Current limit leading edge blanking time⁽¹⁾			100		ns
	Current limit total response time⁽¹⁾			200		ns
THERMAL SHUTDOWN
	Thermal shutdown trip point⁽¹⁾		135	150	165	°C
	Thermal shutdown hysteresis⁽¹⁾			10		°C
OUTPUT POWER MOSFETS
r_DS(on)	Power MOSFET switches	V_I = 6 V⁽⁴⁾		26	47	mΩ
r_DS(on)	Power MOSFET switches	V_I = 3 V⁽⁴⁾		36	65	mΩ

(1) Specified by design

(2) Static resistive loads only

(3) Specified by the circuit used in Figure 10

(4) Matched MOSFETs low-side r_DS(on) production tested, high-side r_DS(on) specified by design