5 Pin Configuration and Functions

Figure 5-1 16-Pin WQFN With Exposed Thermal Pad RTE Package (Top View)

Table 5-1 Pin Functions

PIN		TYPE⁽¹⁾	DESCRIPTION
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION
AGND	5	G	Analog ground must be electrically connected to GND close to the device.
BOOT	13	I	A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the minimum required by the BOOT UVLO, the output is forced to switch off until the capacitor is refreshed.
COMP	7	O	Error amplifier output, and input to the output switch current comparator. Connect frequency compensation components to this pin.
EN	15	I	Enable pin and internal pullup current source. Pull below 1.2 V to disable. Float to enable. Can be used to set the on/off threshold (adjust UVLO) with two additional resistors.
GND	3	G	Power ground. This pin must be electrically connected directly to the power pad under the device.
GND	4	G
PH	10	O	The source of the internal high-side power MOSFET, and drain of the internal low-side (synchronous) rectifier MOSFET.
	11
	12
PWRGD	14	O	An open-drain output, asserts low if output voltage is low due to thermal shutdown, overcurrent, overvoltage and undervoltage, or EN shutdown.
RT/CLK	8	I/O	Resistor timing or external clock input pin
SS/TR	9	I/O	Slow start and tracking. An external capacitor connected to this pin sets the output voltage rise time. This pin can also be used for tracking.
VIN	1	I	Input supply voltage: 2.95 V to 6 V
	2
	16
VSENSE	6	I	Inverting node of the transconductance (gm) error amplifier
Thermal Pad	—	G	GND pin must be connected to the exposed power pad for proper operation. This power pad must be connected to any internal PCB ground plane using multiple vias for good thermal performance.

(1) I = Input, O = Output, G = Ground